blob: f6754bdd4b7d0fa35d76f67007084680cf6ab5d6 [file] [log] [blame]
// Copyright 2014 the V8 project authors. All rights reserved.
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.
#include <stdarg.h>
#include <stdlib.h>
#include <cmath>
#if V8_TARGET_ARCH_S390
#include "src/assembler.h"
#include "src/base/bits.h"
#include "src/base/once.h"
#include "src/codegen.h"
#include "src/disasm.h"
#include "src/macro-assembler.h"
#include "src/ostreams.h"
#include "src/runtime/runtime-utils.h"
#include "src/s390/constants-s390.h"
#include "src/s390/simulator-s390.h"
#if defined(USE_SIMULATOR)
// Only build the simulator if not compiling for real s390 hardware.
namespace v8 {
namespace internal {
const auto GetRegConfig = RegisterConfiguration::Default;
// This macro provides a platform independent use of sscanf. The reason for
// SScanF not being implemented in a platform independent way through
// ::v8::internal::OS in the same way as SNPrintF is that the
// Windows C Run-Time Library does not provide vsscanf.
#define SScanF sscanf // NOLINT
// The S390Debugger class is used by the simulator while debugging simulated
// z/Architecture code.
class S390Debugger {
public:
explicit S390Debugger(Simulator* sim) : sim_(sim) {}
void Stop(Instruction* instr);
void Debug();
private:
#if V8_TARGET_LITTLE_ENDIAN
static const Instr kBreakpointInstr = (0x0000FFB2); // TRAP4 0000
static const Instr kNopInstr = (0x00160016); // OR r0, r0 x2
#else
static const Instr kBreakpointInstr = (0xB2FF0000); // TRAP4 0000
static const Instr kNopInstr = (0x16001600); // OR r0, r0 x2
#endif
Simulator* sim_;
intptr_t GetRegisterValue(int regnum);
double GetRegisterPairDoubleValue(int regnum);
double GetFPDoubleRegisterValue(int regnum);
float GetFPFloatRegisterValue(int regnum);
bool GetValue(const char* desc, intptr_t* value);
bool GetFPDoubleValue(const char* desc, double* value);
// Set or delete a breakpoint. Returns true if successful.
bool SetBreakpoint(Instruction* break_pc);
bool DeleteBreakpoint(Instruction* break_pc);
// Undo and redo all breakpoints. This is needed to bracket disassembly and
// execution to skip past breakpoints when run from the debugger.
void UndoBreakpoints();
void RedoBreakpoints();
};
void S390Debugger::Stop(Instruction* instr) {
// Get the stop code.
// use of kStopCodeMask not right on PowerPC
uint32_t code = instr->SvcValue() & kStopCodeMask;
// Retrieve the encoded address, which comes just after this stop.
char* msg = *reinterpret_cast<char**>(sim_->get_pc() + sizeof(FourByteInstr));
// Update this stop description.
if (sim_->isWatchedStop(code) && !sim_->watched_stops_[code].desc) {
sim_->watched_stops_[code].desc = msg;
}
// Print the stop message and code if it is not the default code.
if (code != kMaxStopCode) {
PrintF("Simulator hit stop %u: %s\n", code, msg);
} else {
PrintF("Simulator hit %s\n", msg);
}
sim_->set_pc(sim_->get_pc() + sizeof(FourByteInstr) + kPointerSize);
Debug();
}
intptr_t S390Debugger::GetRegisterValue(int regnum) {
return sim_->get_register(regnum);
}
double S390Debugger::GetRegisterPairDoubleValue(int regnum) {
return sim_->get_double_from_register_pair(regnum);
}
double S390Debugger::GetFPDoubleRegisterValue(int regnum) {
return sim_->get_double_from_d_register(regnum);
}
float S390Debugger::GetFPFloatRegisterValue(int regnum) {
return sim_->get_float32_from_d_register(regnum);
}
bool S390Debugger::GetValue(const char* desc, intptr_t* value) {
int regnum = Registers::Number(desc);
if (regnum != kNoRegister) {
*value = GetRegisterValue(regnum);
return true;
} else {
if (strncmp(desc, "0x", 2) == 0) {
return SScanF(desc + 2, "%" V8PRIxPTR,
reinterpret_cast<uintptr_t*>(value)) == 1;
} else {
return SScanF(desc, "%" V8PRIuPTR, reinterpret_cast<uintptr_t*>(value)) ==
1;
}
}
return false;
}
bool S390Debugger::GetFPDoubleValue(const char* desc, double* value) {
int regnum = DoubleRegisters::Number(desc);
if (regnum != kNoRegister) {
*value = sim_->get_double_from_d_register(regnum);
return true;
}
return false;
}
bool S390Debugger::SetBreakpoint(Instruction* break_pc) {
// Check if a breakpoint can be set. If not return without any side-effects.
if (sim_->break_pc_ != nullptr) {
return false;
}
// Set the breakpoint.
sim_->break_pc_ = break_pc;
sim_->break_instr_ = break_pc->InstructionBits();
// Not setting the breakpoint instruction in the code itself. It will be set
// when the debugger shell continues.
return true;
}
bool S390Debugger::DeleteBreakpoint(Instruction* break_pc) {
if (sim_->break_pc_ != nullptr) {
sim_->break_pc_->SetInstructionBits(sim_->break_instr_);
}
sim_->break_pc_ = nullptr;
sim_->break_instr_ = 0;
return true;
}
void S390Debugger::UndoBreakpoints() {
if (sim_->break_pc_ != nullptr) {
sim_->break_pc_->SetInstructionBits(sim_->break_instr_);
}
}
void S390Debugger::RedoBreakpoints() {
if (sim_->break_pc_ != nullptr) {
sim_->break_pc_->SetInstructionBits(kBreakpointInstr);
}
}
void S390Debugger::Debug() {
intptr_t last_pc = -1;
bool done = false;
#define COMMAND_SIZE 63
#define ARG_SIZE 255
#define STR(a) #a
#define XSTR(a) STR(a)
char cmd[COMMAND_SIZE + 1];
char arg1[ARG_SIZE + 1];
char arg2[ARG_SIZE + 1];
char* argv[3] = {cmd, arg1, arg2};
// make sure to have a proper terminating character if reaching the limit
cmd[COMMAND_SIZE] = 0;
arg1[ARG_SIZE] = 0;
arg2[ARG_SIZE] = 0;
// Undo all set breakpoints while running in the debugger shell. This will
// make them invisible to all commands.
UndoBreakpoints();
// Disable tracing while simulating
bool trace = ::v8::internal::FLAG_trace_sim;
::v8::internal::FLAG_trace_sim = false;
while (!done && !sim_->has_bad_pc()) {
if (last_pc != sim_->get_pc()) {
disasm::NameConverter converter;
disasm::Disassembler dasm(converter);
// use a reasonably large buffer
v8::internal::EmbeddedVector<char, 256> buffer;
dasm.InstructionDecode(buffer, reinterpret_cast<byte*>(sim_->get_pc()));
PrintF(" 0x%08" V8PRIxPTR " %s\n", sim_->get_pc(), buffer.start());
last_pc = sim_->get_pc();
}
char* line = ReadLine("sim> ");
if (line == nullptr) {
break;
} else {
char* last_input = sim_->last_debugger_input();
if (strcmp(line, "\n") == 0 && last_input != nullptr) {
line = last_input;
} else {
// Ownership is transferred to sim_;
sim_->set_last_debugger_input(line);
}
// Use sscanf to parse the individual parts of the command line. At the
// moment no command expects more than two parameters.
int argc = SScanF(line,
"%" XSTR(COMMAND_SIZE) "s "
"%" XSTR(ARG_SIZE) "s "
"%" XSTR(ARG_SIZE) "s",
cmd, arg1, arg2);
if ((strcmp(cmd, "si") == 0) || (strcmp(cmd, "stepi") == 0)) {
intptr_t value;
// If at a breakpoint, proceed past it.
if ((reinterpret_cast<Instruction*>(sim_->get_pc()))
->InstructionBits() == 0x7D821008) {
sim_->set_pc(sim_->get_pc() + sizeof(FourByteInstr));
} else {
sim_->ExecuteInstruction(
reinterpret_cast<Instruction*>(sim_->get_pc()));
}
if (argc == 2 && last_pc != sim_->get_pc()) {
disasm::NameConverter converter;
disasm::Disassembler dasm(converter);
// use a reasonably large buffer
v8::internal::EmbeddedVector<char, 256> buffer;
if (GetValue(arg1, &value)) {
// Interpret a numeric argument as the number of instructions to
// step past.
for (int i = 1; (!sim_->has_bad_pc()) && i < value; i++) {
dasm.InstructionDecode(buffer,
reinterpret_cast<byte*>(sim_->get_pc()));
PrintF(" 0x%08" V8PRIxPTR " %s\n", sim_->get_pc(),
buffer.start());
sim_->ExecuteInstruction(
reinterpret_cast<Instruction*>(sim_->get_pc()));
}
} else {
// Otherwise treat it as the mnemonic of the opcode to stop at.
char mnemonic[256];
while (!sim_->has_bad_pc()) {
dasm.InstructionDecode(buffer,
reinterpret_cast<byte*>(sim_->get_pc()));
char* mnemonicStart = buffer.start();
while (*mnemonicStart != 0 && *mnemonicStart != ' ')
mnemonicStart++;
SScanF(mnemonicStart, "%s", mnemonic);
if (!strcmp(arg1, mnemonic)) break;
PrintF(" 0x%08" V8PRIxPTR " %s\n", sim_->get_pc(),
buffer.start());
sim_->ExecuteInstruction(
reinterpret_cast<Instruction*>(sim_->get_pc()));
}
}
}
} else if ((strcmp(cmd, "c") == 0) || (strcmp(cmd, "cont") == 0)) {
// If at a breakpoint, proceed past it.
if ((reinterpret_cast<Instruction*>(sim_->get_pc()))
->InstructionBits() == 0x7D821008) {
sim_->set_pc(sim_->get_pc() + sizeof(FourByteInstr));
} else {
// Execute the one instruction we broke at with breakpoints disabled.
sim_->ExecuteInstruction(
reinterpret_cast<Instruction*>(sim_->get_pc()));
}
// Leave the debugger shell.
done = true;
} else if ((strcmp(cmd, "p") == 0) || (strcmp(cmd, "print") == 0)) {
if (argc == 2 || (argc == 3 && strcmp(arg2, "fp") == 0)) {
intptr_t value;
double dvalue;
if (strcmp(arg1, "all") == 0) {
for (int i = 0; i < kNumRegisters; i++) {
value = GetRegisterValue(i);
PrintF(" %3s: %08" V8PRIxPTR,
GetRegConfig()->GetGeneralRegisterName(i), value);
if ((argc == 3 && strcmp(arg2, "fp") == 0) && i < 8 &&
(i % 2) == 0) {
dvalue = GetRegisterPairDoubleValue(i);
PrintF(" (%f)\n", dvalue);
} else if (i != 0 && !((i + 1) & 3)) {
PrintF("\n");
}
}
PrintF(" pc: %08" V8PRIxPTR " cr: %08x\n", sim_->special_reg_pc_,
sim_->condition_reg_);
} else if (strcmp(arg1, "alld") == 0) {
for (int i = 0; i < kNumRegisters; i++) {
value = GetRegisterValue(i);
PrintF(" %3s: %08" V8PRIxPTR " %11" V8PRIdPTR,
GetRegConfig()->GetGeneralRegisterName(i), value, value);
if ((argc == 3 && strcmp(arg2, "fp") == 0) && i < 8 &&
(i % 2) == 0) {
dvalue = GetRegisterPairDoubleValue(i);
PrintF(" (%f)\n", dvalue);
} else if (!((i + 1) % 2)) {
PrintF("\n");
}
}
PrintF(" pc: %08" V8PRIxPTR " cr: %08x\n", sim_->special_reg_pc_,
sim_->condition_reg_);
} else if (strcmp(arg1, "allf") == 0) {
for (int i = 0; i < DoubleRegister::kNumRegisters; i++) {
float fvalue = GetFPFloatRegisterValue(i);
uint32_t as_words = bit_cast<uint32_t>(fvalue);
PrintF("%3s: %f 0x%08x\n",
GetRegConfig()->GetDoubleRegisterName(i), fvalue,
as_words);
}
} else if (strcmp(arg1, "alld") == 0) {
for (int i = 0; i < DoubleRegister::kNumRegisters; i++) {
dvalue = GetFPDoubleRegisterValue(i);
uint64_t as_words = bit_cast<uint64_t>(dvalue);
PrintF("%3s: %f 0x%08x %08x\n",
GetRegConfig()->GetDoubleRegisterName(i), dvalue,
static_cast<uint32_t>(as_words >> 32),
static_cast<uint32_t>(as_words & 0xFFFFFFFF));
}
} else if (arg1[0] == 'r' &&
(arg1[1] >= '0' && arg1[1] <= '2' &&
(arg1[2] == '\0' || (arg1[2] >= '0' && arg1[2] <= '5' &&
arg1[3] == '\0')))) {
int regnum = strtoul(&arg1[1], 0, 10);
if (regnum != kNoRegister) {
value = GetRegisterValue(regnum);
PrintF("%s: 0x%08" V8PRIxPTR " %" V8PRIdPTR "\n", arg1, value,
value);
} else {
PrintF("%s unrecognized\n", arg1);
}
} else {
if (GetValue(arg1, &value)) {
PrintF("%s: 0x%08" V8PRIxPTR " %" V8PRIdPTR "\n", arg1, value,
value);
} else if (GetFPDoubleValue(arg1, &dvalue)) {
uint64_t as_words = bit_cast<uint64_t>(dvalue);
PrintF("%s: %f 0x%08x %08x\n", arg1, dvalue,
static_cast<uint32_t>(as_words >> 32),
static_cast<uint32_t>(as_words & 0xFFFFFFFF));
} else {
PrintF("%s unrecognized\n", arg1);
}
}
} else {
PrintF("print <register>\n");
}
} else if ((strcmp(cmd, "po") == 0) ||
(strcmp(cmd, "printobject") == 0)) {
if (argc == 2) {
intptr_t value;
OFStream os(stdout);
if (GetValue(arg1, &value)) {
Object* obj = reinterpret_cast<Object*>(value);
os << arg1 << ": \n";
#ifdef DEBUG
obj->Print(os);
os << "\n";
#else
os << Brief(obj) << "\n";
#endif
} else {
os << arg1 << " unrecognized\n";
}
} else {
PrintF("printobject <value>\n");
}
} else if (strcmp(cmd, "setpc") == 0) {
intptr_t value;
if (!GetValue(arg1, &value)) {
PrintF("%s unrecognized\n", arg1);
continue;
}
sim_->set_pc(value);
} else if (strcmp(cmd, "stack") == 0 || strcmp(cmd, "mem") == 0) {
intptr_t* cur = nullptr;
intptr_t* end = nullptr;
int next_arg = 1;
if (strcmp(cmd, "stack") == 0) {
cur = reinterpret_cast<intptr_t*>(sim_->get_register(Simulator::sp));
} else { // "mem"
intptr_t value;
if (!GetValue(arg1, &value)) {
PrintF("%s unrecognized\n", arg1);
continue;
}
cur = reinterpret_cast<intptr_t*>(value);
next_arg++;
}
intptr_t words; // likely inaccurate variable name for 64bit
if (argc == next_arg) {
words = 10;
} else {
if (!GetValue(argv[next_arg], &words)) {
words = 10;
}
}
end = cur + words;
while (cur < end) {
PrintF(" 0x%08" V8PRIxPTR ": 0x%08" V8PRIxPTR " %10" V8PRIdPTR,
reinterpret_cast<intptr_t>(cur), *cur, *cur);
HeapObject* obj = reinterpret_cast<HeapObject*>(*cur);
intptr_t value = *cur;
Heap* current_heap = sim_->isolate_->heap();
if (((value & 1) == 0) ||
current_heap->ContainsSlow(obj->address())) {
PrintF("(smi %d)", PlatformSmiTagging::SmiToInt(obj));
} else if (current_heap->Contains(obj)) {
PrintF(" (");
obj->ShortPrint();
PrintF(")");
}
PrintF("\n");
cur++;
}
} else if (strcmp(cmd, "disasm") == 0 || strcmp(cmd, "di") == 0) {
disasm::NameConverter converter;
disasm::Disassembler dasm(converter);
// use a reasonably large buffer
v8::internal::EmbeddedVector<char, 256> buffer;
byte* prev = nullptr;
byte* cur = nullptr;
// Default number of instructions to disassemble.
int32_t numInstructions = 10;
if (argc == 1) {
cur = reinterpret_cast<byte*>(sim_->get_pc());
} else if (argc == 2) {
int regnum = Registers::Number(arg1);
if (regnum != kNoRegister || strncmp(arg1, "0x", 2) == 0) {
// The argument is an address or a register name.
intptr_t value;
if (GetValue(arg1, &value)) {
cur = reinterpret_cast<byte*>(value);
}
} else {
// The argument is the number of instructions.
intptr_t value;
if (GetValue(arg1, &value)) {
cur = reinterpret_cast<byte*>(sim_->get_pc());
// Disassemble <arg1> instructions.
numInstructions = static_cast<int32_t>(value);
}
}
} else {
intptr_t value1;
intptr_t value2;
if (GetValue(arg1, &value1) && GetValue(arg2, &value2)) {
cur = reinterpret_cast<byte*>(value1);
// Disassemble <arg2> instructions.
numInstructions = static_cast<int32_t>(value2);
}
}
while (numInstructions > 0) {
prev = cur;
cur += dasm.InstructionDecode(buffer, cur);
PrintF(" 0x%08" V8PRIxPTR " %s\n", reinterpret_cast<intptr_t>(prev),
buffer.start());
numInstructions--;
}
} else if (strcmp(cmd, "gdb") == 0) {
PrintF("relinquishing control to gdb\n");
v8::base::OS::DebugBreak();
PrintF("regaining control from gdb\n");
} else if (strcmp(cmd, "break") == 0) {
if (argc == 2) {
intptr_t value;
if (GetValue(arg1, &value)) {
if (!SetBreakpoint(reinterpret_cast<Instruction*>(value))) {
PrintF("setting breakpoint failed\n");
}
} else {
PrintF("%s unrecognized\n", arg1);
}
} else {
PrintF("break <address>\n");
}
} else if (strcmp(cmd, "del") == 0) {
if (!DeleteBreakpoint(nullptr)) {
PrintF("deleting breakpoint failed\n");
}
} else if (strcmp(cmd, "cr") == 0) {
PrintF("Condition reg: %08x\n", sim_->condition_reg_);
} else if (strcmp(cmd, "stop") == 0) {
intptr_t value;
intptr_t stop_pc =
sim_->get_pc() - (sizeof(FourByteInstr) + kPointerSize);
Instruction* stop_instr = reinterpret_cast<Instruction*>(stop_pc);
Instruction* msg_address =
reinterpret_cast<Instruction*>(stop_pc + sizeof(FourByteInstr));
if ((argc == 2) && (strcmp(arg1, "unstop") == 0)) {
// Remove the current stop.
if (sim_->isStopInstruction(stop_instr)) {
stop_instr->SetInstructionBits(kNopInstr);
msg_address->SetInstructionBits(kNopInstr);
} else {
PrintF("Not at debugger stop.\n");
}
} else if (argc == 3) {
// Print information about all/the specified breakpoint(s).
if (strcmp(arg1, "info") == 0) {
if (strcmp(arg2, "all") == 0) {
PrintF("Stop information:\n");
for (uint32_t i = 0; i < sim_->kNumOfWatchedStops; i++) {
sim_->PrintStopInfo(i);
}
} else if (GetValue(arg2, &value)) {
sim_->PrintStopInfo(value);
} else {
PrintF("Unrecognized argument.\n");
}
} else if (strcmp(arg1, "enable") == 0) {
// Enable all/the specified breakpoint(s).
if (strcmp(arg2, "all") == 0) {
for (uint32_t i = 0; i < sim_->kNumOfWatchedStops; i++) {
sim_->EnableStop(i);
}
} else if (GetValue(arg2, &value)) {
sim_->EnableStop(value);
} else {
PrintF("Unrecognized argument.\n");
}
} else if (strcmp(arg1, "disable") == 0) {
// Disable all/the specified breakpoint(s).
if (strcmp(arg2, "all") == 0) {
for (uint32_t i = 0; i < sim_->kNumOfWatchedStops; i++) {
sim_->DisableStop(i);
}
} else if (GetValue(arg2, &value)) {
sim_->DisableStop(value);
} else {
PrintF("Unrecognized argument.\n");
}
}
} else {
PrintF("Wrong usage. Use help command for more information.\n");
}
} else if (strcmp(cmd, "icount") == 0) {
PrintF("%05" PRId64 "\n", sim_->icount_);
} else if ((strcmp(cmd, "t") == 0) || strcmp(cmd, "trace") == 0) {
::v8::internal::FLAG_trace_sim = !::v8::internal::FLAG_trace_sim;
PrintF("Trace of executed instructions is %s\n",
::v8::internal::FLAG_trace_sim ? "on" : "off");
} else if ((strcmp(cmd, "h") == 0) || (strcmp(cmd, "help") == 0)) {
PrintF("cont\n");
PrintF(" continue execution (alias 'c')\n");
PrintF("stepi [num instructions]\n");
PrintF(" step one/num instruction(s) (alias 'si')\n");
PrintF("print <register>\n");
PrintF(" print register content (alias 'p')\n");
PrintF(" use register name 'all' to display all integer registers\n");
PrintF(
" use register name 'alld' to display integer registers "
"with decimal values\n");
PrintF(" use register name 'rN' to display register number 'N'\n");
PrintF(" add argument 'fp' to print register pair double values\n");
PrintF(
" use register name 'allf' to display floating-point "
"registers\n");
PrintF("printobject <register>\n");
PrintF(" print an object from a register (alias 'po')\n");
PrintF("cr\n");
PrintF(" print condition register\n");
PrintF("stack [<num words>]\n");
PrintF(" dump stack content, default dump 10 words)\n");
PrintF("mem <address> [<num words>]\n");
PrintF(" dump memory content, default dump 10 words)\n");
PrintF("disasm [<instructions>]\n");
PrintF("disasm [<address/register>]\n");
PrintF("disasm [[<address/register>] <instructions>]\n");
PrintF(" disassemble code, default is 10 instructions\n");
PrintF(" from pc (alias 'di')\n");
PrintF("gdb\n");
PrintF(" enter gdb\n");
PrintF("break <address>\n");
PrintF(" set a break point on the address\n");
PrintF("del\n");
PrintF(" delete the breakpoint\n");
PrintF("trace (alias 't')\n");
PrintF(" toogle the tracing of all executed statements\n");
PrintF("stop feature:\n");
PrintF(" Description:\n");
PrintF(" Stops are debug instructions inserted by\n");
PrintF(" the Assembler::stop() function.\n");
PrintF(" When hitting a stop, the Simulator will\n");
PrintF(" stop and and give control to the S390Debugger.\n");
PrintF(" The first %d stop codes are watched:\n",
Simulator::kNumOfWatchedStops);
PrintF(" - They can be enabled / disabled: the Simulator\n");
PrintF(" will / won't stop when hitting them.\n");
PrintF(" - The Simulator keeps track of how many times they \n");
PrintF(" are met. (See the info command.) Going over a\n");
PrintF(" disabled stop still increases its counter. \n");
PrintF(" Commands:\n");
PrintF(" stop info all/<code> : print infos about number <code>\n");
PrintF(" or all stop(s).\n");
PrintF(" stop enable/disable all/<code> : enables / disables\n");
PrintF(" all or number <code> stop(s)\n");
PrintF(" stop unstop\n");
PrintF(" ignore the stop instruction at the current location\n");
PrintF(" from now on\n");
} else {
PrintF("Unknown command: %s\n", cmd);
}
}
}
// Add all the breakpoints back to stop execution and enter the debugger
// shell when hit.
RedoBreakpoints();
// Restore tracing
::v8::internal::FLAG_trace_sim = trace;
#undef COMMAND_SIZE
#undef ARG_SIZE
#undef STR
#undef XSTR
}
static bool ICacheMatch(void* one, void* two) {
DCHECK_EQ(reinterpret_cast<intptr_t>(one) & CachePage::kPageMask, 0);
DCHECK_EQ(reinterpret_cast<intptr_t>(two) & CachePage::kPageMask, 0);
return one == two;
}
static uint32_t ICacheHash(void* key) {
return static_cast<uint32_t>(reinterpret_cast<uintptr_t>(key)) >> 2;
}
static bool AllOnOnePage(uintptr_t start, int size) {
intptr_t start_page = (start & ~CachePage::kPageMask);
intptr_t end_page = ((start + size) & ~CachePage::kPageMask);
return start_page == end_page;
}
void Simulator::set_last_debugger_input(char* input) {
DeleteArray(last_debugger_input_);
last_debugger_input_ = input;
}
void Simulator::SetRedirectInstruction(Instruction* instruction) {
// we use TRAP4 here (0xBF22)
#if V8_TARGET_LITTLE_ENDIAN
instruction->SetInstructionBits(0x1000FFB2);
#else
instruction->SetInstructionBits(0xB2FF0000 | kCallRtRedirected);
#endif
}
void Simulator::FlushICache(base::CustomMatcherHashMap* i_cache,
void* start_addr, size_t size) {
intptr_t start = reinterpret_cast<intptr_t>(start_addr);
int intra_line = (start & CachePage::kLineMask);
start -= intra_line;
size += intra_line;
size = ((size - 1) | CachePage::kLineMask) + 1;
int offset = (start & CachePage::kPageMask);
while (!AllOnOnePage(start, size - 1)) {
int bytes_to_flush = CachePage::kPageSize - offset;
FlushOnePage(i_cache, start, bytes_to_flush);
start += bytes_to_flush;
size -= bytes_to_flush;
DCHECK_EQ(0, static_cast<int>(start & CachePage::kPageMask));
offset = 0;
}
if (size != 0) {
FlushOnePage(i_cache, start, size);
}
}
CachePage* Simulator::GetCachePage(base::CustomMatcherHashMap* i_cache,
void* page) {
base::HashMap::Entry* entry = i_cache->LookupOrInsert(page, ICacheHash(page));
if (entry->value == nullptr) {
CachePage* new_page = new CachePage();
entry->value = new_page;
}
return reinterpret_cast<CachePage*>(entry->value);
}
// Flush from start up to and not including start + size.
void Simulator::FlushOnePage(base::CustomMatcherHashMap* i_cache,
intptr_t start, int size) {
DCHECK_LE(size, CachePage::kPageSize);
DCHECK(AllOnOnePage(start, size - 1));
DCHECK_EQ(start & CachePage::kLineMask, 0);
DCHECK_EQ(size & CachePage::kLineMask, 0);
void* page = reinterpret_cast<void*>(start & (~CachePage::kPageMask));
int offset = (start & CachePage::kPageMask);
CachePage* cache_page = GetCachePage(i_cache, page);
char* valid_bytemap = cache_page->ValidityByte(offset);
memset(valid_bytemap, CachePage::LINE_INVALID, size >> CachePage::kLineShift);
}
void Simulator::CheckICache(base::CustomMatcherHashMap* i_cache,
Instruction* instr) {
intptr_t address = reinterpret_cast<intptr_t>(instr);
void* page = reinterpret_cast<void*>(address & (~CachePage::kPageMask));
void* line = reinterpret_cast<void*>(address & (~CachePage::kLineMask));
int offset = (address & CachePage::kPageMask);
CachePage* cache_page = GetCachePage(i_cache, page);
char* cache_valid_byte = cache_page->ValidityByte(offset);
bool cache_hit = (*cache_valid_byte == CachePage::LINE_VALID);
char* cached_line = cache_page->CachedData(offset & ~CachePage::kLineMask);
if (cache_hit) {
// Check that the data in memory matches the contents of the I-cache.
CHECK_EQ(memcmp(reinterpret_cast<void*>(instr),
cache_page->CachedData(offset), sizeof(FourByteInstr)),
0);
} else {
// Cache miss. Load memory into the cache.
memcpy(cached_line, line, CachePage::kLineLength);
*cache_valid_byte = CachePage::LINE_VALID;
}
}
Simulator::EvaluateFuncType Simulator::EvalTable[] = {nullptr};
void Simulator::EvalTableInit() {
for (int i = 0; i < MAX_NUM_OPCODES; i++) {
EvalTable[i] = &Simulator::Evaluate_Unknown;
}
#define S390_SUPPORTED_VECTOR_OPCODE_LIST(V) \
V(vfs, VFS, 0xE7E2) /* type = VRR_C VECTOR FP SUBTRACT */ \
V(vfa, VFA, 0xE7E3) /* type = VRR_C VECTOR FP ADD */ \
V(vfd, VFD, 0xE7E5) /* type = VRR_C VECTOR FP DIVIDE */ \
V(vfm, VFM, 0xE7E7) /* type = VRR_C VECTOR FP MULTIPLY */
#define CREATE_EVALUATE_TABLE(name, op_name, op_value) \
EvalTable[op_name] = &Simulator::Evaluate_##op_name;
S390_SUPPORTED_VECTOR_OPCODE_LIST(CREATE_EVALUATE_TABLE);
#undef CREATE_EVALUATE_TABLE
EvalTable[DUMY] = &Simulator::Evaluate_DUMY;
EvalTable[BKPT] = &Simulator::Evaluate_BKPT;
EvalTable[SPM] = &Simulator::Evaluate_SPM;
EvalTable[BALR] = &Simulator::Evaluate_BALR;
EvalTable[BCTR] = &Simulator::Evaluate_BCTR;
EvalTable[BCR] = &Simulator::Evaluate_BCR;
EvalTable[SVC] = &Simulator::Evaluate_SVC;
EvalTable[BSM] = &Simulator::Evaluate_BSM;
EvalTable[BASSM] = &Simulator::Evaluate_BASSM;
EvalTable[BASR] = &Simulator::Evaluate_BASR;
EvalTable[MVCL] = &Simulator::Evaluate_MVCL;
EvalTable[CLCL] = &Simulator::Evaluate_CLCL;
EvalTable[LPR] = &Simulator::Evaluate_LPR;
EvalTable[LNR] = &Simulator::Evaluate_LNR;
EvalTable[LTR] = &Simulator::Evaluate_LTR;
EvalTable[LCR] = &Simulator::Evaluate_LCR;
EvalTable[NR] = &Simulator::Evaluate_NR;
EvalTable[CLR] = &Simulator::Evaluate_CLR;
EvalTable[OR] = &Simulator::Evaluate_OR;
EvalTable[XR] = &Simulator::Evaluate_XR;
EvalTable[LR] = &Simulator::Evaluate_LR;
EvalTable[CR] = &Simulator::Evaluate_CR;
EvalTable[AR] = &Simulator::Evaluate_AR;
EvalTable[SR] = &Simulator::Evaluate_SR;
EvalTable[MR] = &Simulator::Evaluate_MR;
EvalTable[DR] = &Simulator::Evaluate_DR;
EvalTable[ALR] = &Simulator::Evaluate_ALR;
EvalTable[SLR] = &Simulator::Evaluate_SLR;
EvalTable[LDR] = &Simulator::Evaluate_LDR;
EvalTable[CDR] = &Simulator::Evaluate_CDR;
EvalTable[LER] = &Simulator::Evaluate_LER;
EvalTable[STH] = &Simulator::Evaluate_STH;
EvalTable[LA] = &Simulator::Evaluate_LA;
EvalTable[STC] = &Simulator::Evaluate_STC;
EvalTable[IC_z] = &Simulator::Evaluate_IC_z;
EvalTable[EX] = &Simulator::Evaluate_EX;
EvalTable[BAL] = &Simulator::Evaluate_BAL;
EvalTable[BCT] = &Simulator::Evaluate_BCT;
EvalTable[BC] = &Simulator::Evaluate_BC;
EvalTable[LH] = &Simulator::Evaluate_LH;
EvalTable[CH] = &Simulator::Evaluate_CH;
EvalTable[AH] = &Simulator::Evaluate_AH;
EvalTable[SH] = &Simulator::Evaluate_SH;
EvalTable[MH] = &Simulator::Evaluate_MH;
EvalTable[BAS] = &Simulator::Evaluate_BAS;
EvalTable[CVD] = &Simulator::Evaluate_CVD;
EvalTable[CVB] = &Simulator::Evaluate_CVB;
EvalTable[ST] = &Simulator::Evaluate_ST;
EvalTable[LAE] = &Simulator::Evaluate_LAE;
EvalTable[N] = &Simulator::Evaluate_N;
EvalTable[CL] = &Simulator::Evaluate_CL;
EvalTable[O] = &Simulator::Evaluate_O;
EvalTable[X] = &Simulator::Evaluate_X;
EvalTable[L] = &Simulator::Evaluate_L;
EvalTable[C] = &Simulator::Evaluate_C;
EvalTable[A] = &Simulator::Evaluate_A;
EvalTable[S] = &Simulator::Evaluate_S;
EvalTable[M] = &Simulator::Evaluate_M;
EvalTable[D] = &Simulator::Evaluate_D;
EvalTable[AL] = &Simulator::Evaluate_AL;
EvalTable[SL] = &Simulator::Evaluate_SL;
EvalTable[STD] = &Simulator::Evaluate_STD;
EvalTable[LD] = &Simulator::Evaluate_LD;
EvalTable[CD] = &Simulator::Evaluate_CD;
EvalTable[STE] = &Simulator::Evaluate_STE;
EvalTable[MS] = &Simulator::Evaluate_MS;
EvalTable[LE] = &Simulator::Evaluate_LE;
EvalTable[BRXH] = &Simulator::Evaluate_BRXH;
EvalTable[BRXLE] = &Simulator::Evaluate_BRXLE;
EvalTable[BXH] = &Simulator::Evaluate_BXH;
EvalTable[BXLE] = &Simulator::Evaluate_BXLE;
EvalTable[SRL] = &Simulator::Evaluate_SRL;
EvalTable[SLL] = &Simulator::Evaluate_SLL;
EvalTable[SRA] = &Simulator::Evaluate_SRA;
EvalTable[SLA] = &Simulator::Evaluate_SLA;
EvalTable[SRDL] = &Simulator::Evaluate_SRDL;
EvalTable[SLDL] = &Simulator::Evaluate_SLDL;
EvalTable[SRDA] = &Simulator::Evaluate_SRDA;
EvalTable[SLDA] = &Simulator::Evaluate_SLDA;
EvalTable[STM] = &Simulator::Evaluate_STM;
EvalTable[TM] = &Simulator::Evaluate_TM;
EvalTable[MVI] = &Simulator::Evaluate_MVI;
EvalTable[TS] = &Simulator::Evaluate_TS;
EvalTable[NI] = &Simulator::Evaluate_NI;
EvalTable[CLI] = &Simulator::Evaluate_CLI;
EvalTable[OI] = &Simulator::Evaluate_OI;
EvalTable[XI] = &Simulator::Evaluate_XI;
EvalTable[LM] = &Simulator::Evaluate_LM;
EvalTable[CS] = &Simulator::Evaluate_CS;
EvalTable[MVCLE] = &Simulator::Evaluate_MVCLE;
EvalTable[CLCLE] = &Simulator::Evaluate_CLCLE;
EvalTable[MC] = &Simulator::Evaluate_MC;
EvalTable[CDS] = &Simulator::Evaluate_CDS;
EvalTable[STCM] = &Simulator::Evaluate_STCM;
EvalTable[ICM] = &Simulator::Evaluate_ICM;
EvalTable[BPRP] = &Simulator::Evaluate_BPRP;
EvalTable[BPP] = &Simulator::Evaluate_BPP;
EvalTable[TRTR] = &Simulator::Evaluate_TRTR;
EvalTable[MVN] = &Simulator::Evaluate_MVN;
EvalTable[MVC] = &Simulator::Evaluate_MVC;
EvalTable[MVZ] = &Simulator::Evaluate_MVZ;
EvalTable[NC] = &Simulator::Evaluate_NC;
EvalTable[CLC] = &Simulator::Evaluate_CLC;
EvalTable[OC] = &Simulator::Evaluate_OC;
EvalTable[XC] = &Simulator::Evaluate_XC;
EvalTable[MVCP] = &Simulator::Evaluate_MVCP;
EvalTable[TR] = &Simulator::Evaluate_TR;
EvalTable[TRT] = &Simulator::Evaluate_TRT;
EvalTable[ED] = &Simulator::Evaluate_ED;
EvalTable[EDMK] = &Simulator::Evaluate_EDMK;
EvalTable[PKU] = &Simulator::Evaluate_PKU;
EvalTable[UNPKU] = &Simulator::Evaluate_UNPKU;
EvalTable[MVCIN] = &Simulator::Evaluate_MVCIN;
EvalTable[PKA] = &Simulator::Evaluate_PKA;
EvalTable[UNPKA] = &Simulator::Evaluate_UNPKA;
EvalTable[PLO] = &Simulator::Evaluate_PLO;
EvalTable[LMD] = &Simulator::Evaluate_LMD;
EvalTable[SRP] = &Simulator::Evaluate_SRP;
EvalTable[MVO] = &Simulator::Evaluate_MVO;
EvalTable[PACK] = &Simulator::Evaluate_PACK;
EvalTable[UNPK] = &Simulator::Evaluate_UNPK;
EvalTable[ZAP] = &Simulator::Evaluate_ZAP;
EvalTable[AP] = &Simulator::Evaluate_AP;
EvalTable[SP] = &Simulator::Evaluate_SP;
EvalTable[MP] = &Simulator::Evaluate_MP;
EvalTable[DP] = &Simulator::Evaluate_DP;
EvalTable[UPT] = &Simulator::Evaluate_UPT;
EvalTable[PFPO] = &Simulator::Evaluate_PFPO;
EvalTable[IIHH] = &Simulator::Evaluate_IIHH;
EvalTable[IIHL] = &Simulator::Evaluate_IIHL;
EvalTable[IILH] = &Simulator::Evaluate_IILH;
EvalTable[IILL] = &Simulator::Evaluate_IILL;
EvalTable[NIHH] = &Simulator::Evaluate_NIHH;
EvalTable[NIHL] = &Simulator::Evaluate_NIHL;
EvalTable[NILH] = &Simulator::Evaluate_NILH;
EvalTable[NILL] = &Simulator::Evaluate_NILL;
EvalTable[OIHH] = &Simulator::Evaluate_OIHH;
EvalTable[OIHL] = &Simulator::Evaluate_OIHL;
EvalTable[OILH] = &Simulator::Evaluate_OILH;
EvalTable[OILL] = &Simulator::Evaluate_OILL;
EvalTable[LLIHH] = &Simulator::Evaluate_LLIHH;
EvalTable[LLIHL] = &Simulator::Evaluate_LLIHL;
EvalTable[LLILH] = &Simulator::Evaluate_LLILH;
EvalTable[LLILL] = &Simulator::Evaluate_LLILL;
EvalTable[TMLH] = &Simulator::Evaluate_TMLH;
EvalTable[TMLL] = &Simulator::Evaluate_TMLL;
EvalTable[TMHH] = &Simulator::Evaluate_TMHH;
EvalTable[TMHL] = &Simulator::Evaluate_TMHL;
EvalTable[BRC] = &Simulator::Evaluate_BRC;
EvalTable[BRAS] = &Simulator::Evaluate_BRAS;
EvalTable[BRCT] = &Simulator::Evaluate_BRCT;
EvalTable[BRCTG] = &Simulator::Evaluate_BRCTG;
EvalTable[LHI] = &Simulator::Evaluate_LHI;
EvalTable[LGHI] = &Simulator::Evaluate_LGHI;
EvalTable[AHI] = &Simulator::Evaluate_AHI;
EvalTable[AGHI] = &Simulator::Evaluate_AGHI;
EvalTable[MHI] = &Simulator::Evaluate_MHI;
EvalTable[MGHI] = &Simulator::Evaluate_MGHI;
EvalTable[CHI] = &Simulator::Evaluate_CHI;
EvalTable[CGHI] = &Simulator::Evaluate_CGHI;
EvalTable[LARL] = &Simulator::Evaluate_LARL;
EvalTable[LGFI] = &Simulator::Evaluate_LGFI;
EvalTable[BRCL] = &Simulator::Evaluate_BRCL;
EvalTable[BRASL] = &Simulator::Evaluate_BRASL;
EvalTable[XIHF] = &Simulator::Evaluate_XIHF;
EvalTable[XILF] = &Simulator::Evaluate_XILF;
EvalTable[IIHF] = &Simulator::Evaluate_IIHF;
EvalTable[IILF] = &Simulator::Evaluate_IILF;
EvalTable[NIHF] = &Simulator::Evaluate_NIHF;
EvalTable[NILF] = &Simulator::Evaluate_NILF;
EvalTable[OIHF] = &Simulator::Evaluate_OIHF;
EvalTable[OILF] = &Simulator::Evaluate_OILF;
EvalTable[LLIHF] = &Simulator::Evaluate_LLIHF;
EvalTable[LLILF] = &Simulator::Evaluate_LLILF;
EvalTable[MSGFI] = &Simulator::Evaluate_MSGFI;
EvalTable[MSFI] = &Simulator::Evaluate_MSFI;
EvalTable[SLGFI] = &Simulator::Evaluate_SLGFI;
EvalTable[SLFI] = &Simulator::Evaluate_SLFI;
EvalTable[AGFI] = &Simulator::Evaluate_AGFI;
EvalTable[AFI] = &Simulator::Evaluate_AFI;
EvalTable[ALGFI] = &Simulator::Evaluate_ALGFI;
EvalTable[ALFI] = &Simulator::Evaluate_ALFI;
EvalTable[CGFI] = &Simulator::Evaluate_CGFI;
EvalTable[CFI] = &Simulator::Evaluate_CFI;
EvalTable[CLGFI] = &Simulator::Evaluate_CLGFI;
EvalTable[CLFI] = &Simulator::Evaluate_CLFI;
EvalTable[LLHRL] = &Simulator::Evaluate_LLHRL;
EvalTable[LGHRL] = &Simulator::Evaluate_LGHRL;
EvalTable[LHRL] = &Simulator::Evaluate_LHRL;
EvalTable[LLGHRL] = &Simulator::Evaluate_LLGHRL;
EvalTable[STHRL] = &Simulator::Evaluate_STHRL;
EvalTable[LGRL] = &Simulator::Evaluate_LGRL;
EvalTable[STGRL] = &Simulator::Evaluate_STGRL;
EvalTable[LGFRL] = &Simulator::Evaluate_LGFRL;
EvalTable[LRL] = &Simulator::Evaluate_LRL;
EvalTable[LLGFRL] = &Simulator::Evaluate_LLGFRL;
EvalTable[STRL] = &Simulator::Evaluate_STRL;
EvalTable[EXRL] = &Simulator::Evaluate_EXRL;
EvalTable[PFDRL] = &Simulator::Evaluate_PFDRL;
EvalTable[CGHRL] = &Simulator::Evaluate_CGHRL;
EvalTable[CHRL] = &Simulator::Evaluate_CHRL;
EvalTable[CGRL] = &Simulator::Evaluate_CGRL;
EvalTable[CGFRL] = &Simulator::Evaluate_CGFRL;
EvalTable[ECTG] = &Simulator::Evaluate_ECTG;
EvalTable[CSST] = &Simulator::Evaluate_CSST;
EvalTable[LPD] = &Simulator::Evaluate_LPD;
EvalTable[LPDG] = &Simulator::Evaluate_LPDG;
EvalTable[BRCTH] = &Simulator::Evaluate_BRCTH;
EvalTable[AIH] = &Simulator::Evaluate_AIH;
EvalTable[ALSIH] = &Simulator::Evaluate_ALSIH;
EvalTable[ALSIHN] = &Simulator::Evaluate_ALSIHN;
EvalTable[CIH] = &Simulator::Evaluate_CIH;
EvalTable[CLIH] = &Simulator::Evaluate_CLIH;
EvalTable[STCK] = &Simulator::Evaluate_STCK;
EvalTable[CFC] = &Simulator::Evaluate_CFC;
EvalTable[IPM] = &Simulator::Evaluate_IPM;
EvalTable[HSCH] = &Simulator::Evaluate_HSCH;
EvalTable[MSCH] = &Simulator::Evaluate_MSCH;
EvalTable[SSCH] = &Simulator::Evaluate_SSCH;
EvalTable[STSCH] = &Simulator::Evaluate_STSCH;
EvalTable[TSCH] = &Simulator::Evaluate_TSCH;
EvalTable[TPI] = &Simulator::Evaluate_TPI;
EvalTable[SAL] = &Simulator::Evaluate_SAL;
EvalTable[RSCH] = &Simulator::Evaluate_RSCH;
EvalTable[STCRW] = &Simulator::Evaluate_STCRW;
EvalTable[STCPS] = &Simulator::Evaluate_STCPS;
EvalTable[RCHP] = &Simulator::Evaluate_RCHP;
EvalTable[SCHM] = &Simulator::Evaluate_SCHM;
EvalTable[CKSM] = &Simulator::Evaluate_CKSM;
EvalTable[SAR] = &Simulator::Evaluate_SAR;
EvalTable[EAR] = &Simulator::Evaluate_EAR;
EvalTable[MSR] = &Simulator::Evaluate_MSR;
EvalTable[MSRKC] = &Simulator::Evaluate_MSRKC;
EvalTable[MVST] = &Simulator::Evaluate_MVST;
EvalTable[CUSE] = &Simulator::Evaluate_CUSE;
EvalTable[SRST] = &Simulator::Evaluate_SRST;
EvalTable[XSCH] = &Simulator::Evaluate_XSCH;
EvalTable[STCKE] = &Simulator::Evaluate_STCKE;
EvalTable[STCKF] = &Simulator::Evaluate_STCKF;
EvalTable[SRNM] = &Simulator::Evaluate_SRNM;
EvalTable[STFPC] = &Simulator::Evaluate_STFPC;
EvalTable[LFPC] = &Simulator::Evaluate_LFPC;
EvalTable[TRE] = &Simulator::Evaluate_TRE;
EvalTable[CUUTF] = &Simulator::Evaluate_CUUTF;
EvalTable[CUTFU] = &Simulator::Evaluate_CUTFU;
EvalTable[STFLE] = &Simulator::Evaluate_STFLE;
EvalTable[SRNMB] = &Simulator::Evaluate_SRNMB;
EvalTable[SRNMT] = &Simulator::Evaluate_SRNMT;
EvalTable[LFAS] = &Simulator::Evaluate_LFAS;
EvalTable[PPA] = &Simulator::Evaluate_PPA;
EvalTable[ETND] = &Simulator::Evaluate_ETND;
EvalTable[TEND] = &Simulator::Evaluate_TEND;
EvalTable[NIAI] = &Simulator::Evaluate_NIAI;
EvalTable[TABORT] = &Simulator::Evaluate_TABORT;
EvalTable[TRAP4] = &Simulator::Evaluate_TRAP4;
EvalTable[LPEBR] = &Simulator::Evaluate_LPEBR;
EvalTable[LNEBR] = &Simulator::Evaluate_LNEBR;
EvalTable[LTEBR] = &Simulator::Evaluate_LTEBR;
EvalTable[LCEBR] = &Simulator::Evaluate_LCEBR;
EvalTable[LDEBR] = &Simulator::Evaluate_LDEBR;
EvalTable[LXDBR] = &Simulator::Evaluate_LXDBR;
EvalTable[LXEBR] = &Simulator::Evaluate_LXEBR;
EvalTable[MXDBR] = &Simulator::Evaluate_MXDBR;
EvalTable[KEBR] = &Simulator::Evaluate_KEBR;
EvalTable[CEBR] = &Simulator::Evaluate_CEBR;
EvalTable[AEBR] = &Simulator::Evaluate_AEBR;
EvalTable[SEBR] = &Simulator::Evaluate_SEBR;
EvalTable[MDEBR] = &Simulator::Evaluate_MDEBR;
EvalTable[DEBR] = &Simulator::Evaluate_DEBR;
EvalTable[MAEBR] = &Simulator::Evaluate_MAEBR;
EvalTable[MSEBR] = &Simulator::Evaluate_MSEBR;
EvalTable[LPDBR] = &Simulator::Evaluate_LPDBR;
EvalTable[LNDBR] = &Simulator::Evaluate_LNDBR;
EvalTable[LTDBR] = &Simulator::Evaluate_LTDBR;
EvalTable[LCDBR] = &Simulator::Evaluate_LCDBR;
EvalTable[SQEBR] = &Simulator::Evaluate_SQEBR;
EvalTable[SQDBR] = &Simulator::Evaluate_SQDBR;
EvalTable[SQXBR] = &Simulator::Evaluate_SQXBR;
EvalTable[MEEBR] = &Simulator::Evaluate_MEEBR;
EvalTable[KDBR] = &Simulator::Evaluate_KDBR;
EvalTable[CDBR] = &Simulator::Evaluate_CDBR;
EvalTable[ADBR] = &Simulator::Evaluate_ADBR;
EvalTable[SDBR] = &Simulator::Evaluate_SDBR;
EvalTable[MDBR] = &Simulator::Evaluate_MDBR;
EvalTable[DDBR] = &Simulator::Evaluate_DDBR;
EvalTable[MADBR] = &Simulator::Evaluate_MADBR;
EvalTable[MSDBR] = &Simulator::Evaluate_MSDBR;
EvalTable[LPXBR] = &Simulator::Evaluate_LPXBR;
EvalTable[LNXBR] = &Simulator::Evaluate_LNXBR;
EvalTable[LTXBR] = &Simulator::Evaluate_LTXBR;
EvalTable[LCXBR] = &Simulator::Evaluate_LCXBR;
EvalTable[LEDBRA] = &Simulator::Evaluate_LEDBRA;
EvalTable[LDXBRA] = &Simulator::Evaluate_LDXBRA;
EvalTable[LEXBRA] = &Simulator::Evaluate_LEXBRA;
EvalTable[FIXBRA] = &Simulator::Evaluate_FIXBRA;
EvalTable[KXBR] = &Simulator::Evaluate_KXBR;
EvalTable[CXBR] = &Simulator::Evaluate_CXBR;
EvalTable[AXBR] = &Simulator::Evaluate_AXBR;
EvalTable[SXBR] = &Simulator::Evaluate_SXBR;
EvalTable[MXBR] = &Simulator::Evaluate_MXBR;
EvalTable[DXBR] = &Simulator::Evaluate_DXBR;
EvalTable[TBEDR] = &Simulator::Evaluate_TBEDR;
EvalTable[TBDR] = &Simulator::Evaluate_TBDR;
EvalTable[DIEBR] = &Simulator::Evaluate_DIEBR;
EvalTable[FIEBRA] = &Simulator::Evaluate_FIEBRA;
EvalTable[THDER] = &Simulator::Evaluate_THDER;
EvalTable[THDR] = &Simulator::Evaluate_THDR;
EvalTable[DIDBR] = &Simulator::Evaluate_DIDBR;
EvalTable[FIDBRA] = &Simulator::Evaluate_FIDBRA;
EvalTable[LXR] = &Simulator::Evaluate_LXR;
EvalTable[LPDFR] = &Simulator::Evaluate_LPDFR;
EvalTable[LNDFR] = &Simulator::Evaluate_LNDFR;
EvalTable[LCDFR] = &Simulator::Evaluate_LCDFR;
EvalTable[LZER] = &Simulator::Evaluate_LZER;
EvalTable[LZDR] = &Simulator::Evaluate_LZDR;
EvalTable[LZXR] = &Simulator::Evaluate_LZXR;
EvalTable[SFPC] = &Simulator::Evaluate_SFPC;
EvalTable[SFASR] = &Simulator::Evaluate_SFASR;
EvalTable[EFPC] = &Simulator::Evaluate_EFPC;
EvalTable[CELFBR] = &Simulator::Evaluate_CELFBR;
EvalTable[CDLFBR] = &Simulator::Evaluate_CDLFBR;
EvalTable[CXLFBR] = &Simulator::Evaluate_CXLFBR;
EvalTable[CEFBRA] = &Simulator::Evaluate_CEFBRA;
EvalTable[CDFBRA] = &Simulator::Evaluate_CDFBRA;
EvalTable[CXFBRA] = &Simulator::Evaluate_CXFBRA;
EvalTable[CFEBRA] = &Simulator::Evaluate_CFEBRA;
EvalTable[CFDBRA] = &Simulator::Evaluate_CFDBRA;
EvalTable[CFXBRA] = &Simulator::Evaluate_CFXBRA;
EvalTable[CLFEBR] = &Simulator::Evaluate_CLFEBR;
EvalTable[CLFDBR] = &Simulator::Evaluate_CLFDBR;
EvalTable[CLFXBR] = &Simulator::Evaluate_CLFXBR;
EvalTable[CELGBR] = &Simulator::Evaluate_CELGBR;
EvalTable[CDLGBR] = &Simulator::Evaluate_CDLGBR;
EvalTable[CXLGBR] = &Simulator::Evaluate_CXLGBR;
EvalTable[CEGBRA] = &Simulator::Evaluate_CEGBRA;
EvalTable[CDGBRA] = &Simulator::Evaluate_CDGBRA;
EvalTable[CXGBRA] = &Simulator::Evaluate_CXGBRA;
EvalTable[CGEBRA] = &Simulator::Evaluate_CGEBRA;
EvalTable[CGDBRA] = &Simulator::Evaluate_CGDBRA;
EvalTable[CGXBRA] = &Simulator::Evaluate_CGXBRA;
EvalTable[CLGEBR] = &Simulator::Evaluate_CLGEBR;
EvalTable[CLGDBR] = &Simulator::Evaluate_CLGDBR;
EvalTable[CFER] = &Simulator::Evaluate_CFER;
EvalTable[CFDR] = &Simulator::Evaluate_CFDR;
EvalTable[CFXR] = &Simulator::Evaluate_CFXR;
EvalTable[LDGR] = &Simulator::Evaluate_LDGR;
EvalTable[CGER] = &Simulator::Evaluate_CGER;
EvalTable[CGDR] = &Simulator::Evaluate_CGDR;
EvalTable[CGXR] = &Simulator::Evaluate_CGXR;
EvalTable[LGDR] = &Simulator::Evaluate_LGDR;
EvalTable[MDTR] = &Simulator::Evaluate_MDTR;
EvalTable[MDTRA] = &Simulator::Evaluate_MDTRA;
EvalTable[DDTRA] = &Simulator::Evaluate_DDTRA;
EvalTable[ADTRA] = &Simulator::Evaluate_ADTRA;
EvalTable[SDTRA] = &Simulator::Evaluate_SDTRA;
EvalTable[LDETR] = &Simulator::Evaluate_LDETR;
EvalTable[LEDTR] = &Simulator::Evaluate_LEDTR;
EvalTable[LTDTR] = &Simulator::Evaluate_LTDTR;
EvalTable[FIDTR] = &Simulator::Evaluate_FIDTR;
EvalTable[MXTRA] = &Simulator::Evaluate_MXTRA;
EvalTable[DXTRA] = &Simulator::Evaluate_DXTRA;
EvalTable[AXTRA] = &Simulator::Evaluate_AXTRA;
EvalTable[SXTRA] = &Simulator::Evaluate_SXTRA;
EvalTable[LXDTR] = &Simulator::Evaluate_LXDTR;
EvalTable[LDXTR] = &Simulator::Evaluate_LDXTR;
EvalTable[LTXTR] = &Simulator::Evaluate_LTXTR;
EvalTable[FIXTR] = &Simulator::Evaluate_FIXTR;
EvalTable[KDTR] = &Simulator::Evaluate_KDTR;
EvalTable[CGDTRA] = &Simulator::Evaluate_CGDTRA;
EvalTable[CUDTR] = &Simulator::Evaluate_CUDTR;
EvalTable[CDTR] = &Simulator::Evaluate_CDTR;
EvalTable[EEDTR] = &Simulator::Evaluate_EEDTR;
EvalTable[ESDTR] = &Simulator::Evaluate_ESDTR;
EvalTable[KXTR] = &Simulator::Evaluate_KXTR;
EvalTable[CGXTRA] = &Simulator::Evaluate_CGXTRA;
EvalTable[CUXTR] = &Simulator::Evaluate_CUXTR;
EvalTable[CSXTR] = &Simulator::Evaluate_CSXTR;
EvalTable[CXTR] = &Simulator::Evaluate_CXTR;
EvalTable[EEXTR] = &Simulator::Evaluate_EEXTR;
EvalTable[ESXTR] = &Simulator::Evaluate_ESXTR;
EvalTable[CDGTRA] = &Simulator::Evaluate_CDGTRA;
EvalTable[CDUTR] = &Simulator::Evaluate_CDUTR;
EvalTable[CDSTR] = &Simulator::Evaluate_CDSTR;
EvalTable[CEDTR] = &Simulator::Evaluate_CEDTR;
EvalTable[QADTR] = &Simulator::Evaluate_QADTR;
EvalTable[IEDTR] = &Simulator::Evaluate_IEDTR;
EvalTable[RRDTR] = &Simulator::Evaluate_RRDTR;
EvalTable[CXGTRA] = &Simulator::Evaluate_CXGTRA;
EvalTable[CXUTR] = &Simulator::Evaluate_CXUTR;
EvalTable[CXSTR] = &Simulator::Evaluate_CXSTR;
EvalTable[CEXTR] = &Simulator::Evaluate_CEXTR;
EvalTable[QAXTR] = &Simulator::Evaluate_QAXTR;
EvalTable[IEXTR] = &Simulator::Evaluate_IEXTR;
EvalTable[RRXTR] = &Simulator::Evaluate_RRXTR;
EvalTable[LPGR] = &Simulator::Evaluate_LPGR;
EvalTable[LNGR] = &Simulator::Evaluate_LNGR;
EvalTable[LTGR] = &Simulator::Evaluate_LTGR;
EvalTable[LCGR] = &Simulator::Evaluate_LCGR;
EvalTable[LGR] = &Simulator::Evaluate_LGR;
EvalTable[LGBR] = &Simulator::Evaluate_LGBR;
EvalTable[LGHR] = &Simulator::Evaluate_LGHR;
EvalTable[AGR] = &Simulator::Evaluate_AGR;
EvalTable[SGR] = &Simulator::Evaluate_SGR;
EvalTable[ALGR] = &Simulator::Evaluate_ALGR;
EvalTable[SLGR] = &Simulator::Evaluate_SLGR;
EvalTable[MSGR] = &Simulator::Evaluate_MSGR;
EvalTable[MSGRKC] = &Simulator::Evaluate_MSGRKC;
EvalTable[DSGR] = &Simulator::Evaluate_DSGR;
EvalTable[LRVGR] = &Simulator::Evaluate_LRVGR;
EvalTable[LPGFR] = &Simulator::Evaluate_LPGFR;
EvalTable[LNGFR] = &Simulator::Evaluate_LNGFR;
EvalTable[LTGFR] = &Simulator::Evaluate_LTGFR;
EvalTable[LCGFR] = &Simulator::Evaluate_LCGFR;
EvalTable[LGFR] = &Simulator::Evaluate_LGFR;
EvalTable[LLGFR] = &Simulator::Evaluate_LLGFR;
EvalTable[LLGTR] = &Simulator::Evaluate_LLGTR;
EvalTable[AGFR] = &Simulator::Evaluate_AGFR;
EvalTable[SGFR] = &Simulator::Evaluate_SGFR;
EvalTable[ALGFR] = &Simulator::Evaluate_ALGFR;
EvalTable[SLGFR] = &Simulator::Evaluate_SLGFR;
EvalTable[MSGFR] = &Simulator::Evaluate_MSGFR;
EvalTable[DSGFR] = &Simulator::Evaluate_DSGFR;
EvalTable[KMAC] = &Simulator::Evaluate_KMAC;
EvalTable[LRVR] = &Simulator::Evaluate_LRVR;
EvalTable[CGR] = &Simulator::Evaluate_CGR;
EvalTable[CLGR] = &Simulator::Evaluate_CLGR;
EvalTable[LBR] = &Simulator::Evaluate_LBR;
EvalTable[LHR] = &Simulator::Evaluate_LHR;
EvalTable[KMF] = &Simulator::Evaluate_KMF;
EvalTable[KMO] = &Simulator::Evaluate_KMO;
EvalTable[PCC] = &Simulator::Evaluate_PCC;
EvalTable[KMCTR] = &Simulator::Evaluate_KMCTR;
EvalTable[KM] = &Simulator::Evaluate_KM;
EvalTable[KMC] = &Simulator::Evaluate_KMC;
EvalTable[CGFR] = &Simulator::Evaluate_CGFR;
EvalTable[KIMD] = &Simulator::Evaluate_KIMD;
EvalTable[KLMD] = &Simulator::Evaluate_KLMD;
EvalTable[CFDTR] = &Simulator::Evaluate_CFDTR;
EvalTable[CLGDTR] = &Simulator::Evaluate_CLGDTR;
EvalTable[CLFDTR] = &Simulator::Evaluate_CLFDTR;
EvalTable[BCTGR] = &Simulator::Evaluate_BCTGR;
EvalTable[CFXTR] = &Simulator::Evaluate_CFXTR;
EvalTable[CLFXTR] = &Simulator::Evaluate_CLFXTR;
EvalTable[CDFTR] = &Simulator::Evaluate_CDFTR;
EvalTable[CDLGTR] = &Simulator::Evaluate_CDLGTR;
EvalTable[CDLFTR] = &Simulator::Evaluate_CDLFTR;
EvalTable[CXFTR] = &Simulator::Evaluate_CXFTR;
EvalTable[CXLGTR] = &Simulator::Evaluate_CXLGTR;
EvalTable[CXLFTR] = &Simulator::Evaluate_CXLFTR;
EvalTable[CGRT] = &Simulator::Evaluate_CGRT;
EvalTable[NGR] = &Simulator::Evaluate_NGR;
EvalTable[OGR] = &Simulator::Evaluate_OGR;
EvalTable[XGR] = &Simulator::Evaluate_XGR;
EvalTable[FLOGR] = &Simulator::Evaluate_FLOGR;
EvalTable[LLGCR] = &Simulator::Evaluate_LLGCR;
EvalTable[LLGHR] = &Simulator::Evaluate_LLGHR;
EvalTable[MLGR] = &Simulator::Evaluate_MLGR;
EvalTable[DLGR] = &Simulator::Evaluate_DLGR;
EvalTable[ALCGR] = &Simulator::Evaluate_ALCGR;
EvalTable[SLBGR] = &Simulator::Evaluate_SLBGR;
EvalTable[EPSW] = &Simulator::Evaluate_EPSW;
EvalTable[TRTT] = &Simulator::Evaluate_TRTT;
EvalTable[TRTO] = &Simulator::Evaluate_TRTO;
EvalTable[TROT] = &Simulator::Evaluate_TROT;
EvalTable[TROO] = &Simulator::Evaluate_TROO;
EvalTable[LLCR] = &Simulator::Evaluate_LLCR;
EvalTable[LLHR] = &Simulator::Evaluate_LLHR;
EvalTable[MLR] = &Simulator::Evaluate_MLR;
EvalTable[DLR] = &Simulator::Evaluate_DLR;
EvalTable[ALCR] = &Simulator::Evaluate_ALCR;
EvalTable[SLBR] = &Simulator::Evaluate_SLBR;
EvalTable[CU14] = &Simulator::Evaluate_CU14;
EvalTable[CU24] = &Simulator::Evaluate_CU24;
EvalTable[CU41] = &Simulator::Evaluate_CU41;
EvalTable[CU42] = &Simulator::Evaluate_CU42;
EvalTable[TRTRE] = &Simulator::Evaluate_TRTRE;
EvalTable[SRSTU] = &Simulator::Evaluate_SRSTU;
EvalTable[TRTE] = &Simulator::Evaluate_TRTE;
EvalTable[AHHHR] = &Simulator::Evaluate_AHHHR;
EvalTable[SHHHR] = &Simulator::Evaluate_SHHHR;
EvalTable[ALHHHR] = &Simulator::Evaluate_ALHHHR;
EvalTable[SLHHHR] = &Simulator::Evaluate_SLHHHR;
EvalTable[CHHR] = &Simulator::Evaluate_CHHR;
EvalTable[AHHLR] = &Simulator::Evaluate_AHHLR;
EvalTable[SHHLR] = &Simulator::Evaluate_SHHLR;
EvalTable[ALHHLR] = &Simulator::Evaluate_ALHHLR;
EvalTable[SLHHLR] = &Simulator::Evaluate_SLHHLR;
EvalTable[CHLR] = &Simulator::Evaluate_CHLR;
EvalTable[POPCNT_Z] = &Simulator::Evaluate_POPCNT_Z;
EvalTable[LOCGR] = &Simulator::Evaluate_LOCGR;
EvalTable[NGRK] = &Simulator::Evaluate_NGRK;
EvalTable[OGRK] = &Simulator::Evaluate_OGRK;
EvalTable[XGRK] = &Simulator::Evaluate_XGRK;
EvalTable[AGRK] = &Simulator::Evaluate_AGRK;
EvalTable[SGRK] = &Simulator::Evaluate_SGRK;
EvalTable[ALGRK] = &Simulator::Evaluate_ALGRK;
EvalTable[SLGRK] = &Simulator::Evaluate_SLGRK;
EvalTable[LOCR] = &Simulator::Evaluate_LOCR;
EvalTable[NRK] = &Simulator::Evaluate_NRK;
EvalTable[ORK] = &Simulator::Evaluate_ORK;
EvalTable[XRK] = &Simulator::Evaluate_XRK;
EvalTable[ARK] = &Simulator::Evaluate_ARK;
EvalTable[SRK] = &Simulator::Evaluate_SRK;
EvalTable[ALRK] = &Simulator::Evaluate_ALRK;
EvalTable[SLRK] = &Simulator::Evaluate_SLRK;
EvalTable[LTG] = &Simulator::Evaluate_LTG;
EvalTable[LG] = &Simulator::Evaluate_LG;
EvalTable[CVBY] = &Simulator::Evaluate_CVBY;
EvalTable[AG] = &Simulator::Evaluate_AG;
EvalTable[SG] = &Simulator::Evaluate_SG;
EvalTable[ALG] = &Simulator::Evaluate_ALG;
EvalTable[SLG] = &Simulator::Evaluate_SLG;
EvalTable[MSG] = &Simulator::Evaluate_MSG;
EvalTable[DSG] = &Simulator::Evaluate_DSG;
EvalTable[CVBG] = &Simulator::Evaluate_CVBG;
EvalTable[LRVG] = &Simulator::Evaluate_LRVG;
EvalTable[LT] = &Simulator::Evaluate_LT;
EvalTable[LGF] = &Simulator::Evaluate_LGF;
EvalTable[LGH] = &Simulator::Evaluate_LGH;
EvalTable[LLGF] = &Simulator::Evaluate_LLGF;
EvalTable[LLGT] = &Simulator::Evaluate_LLGT;
EvalTable[AGF] = &Simulator::Evaluate_AGF;
EvalTable[SGF] = &Simulator::Evaluate_SGF;
EvalTable[ALGF] = &Simulator::Evaluate_ALGF;
EvalTable[SLGF] = &Simulator::Evaluate_SLGF;
EvalTable[MSGF] = &Simulator::Evaluate_MSGF;
EvalTable[DSGF] = &Simulator::Evaluate_DSGF;
EvalTable[LRV] = &Simulator::Evaluate_LRV;
EvalTable[LRVH] = &Simulator::Evaluate_LRVH;
EvalTable[CG] = &Simulator::Evaluate_CG;
EvalTable[CLG] = &Simulator::Evaluate_CLG;
EvalTable[STG] = &Simulator::Evaluate_STG;
EvalTable[NTSTG] = &Simulator::Evaluate_NTSTG;
EvalTable[CVDY] = &Simulator::Evaluate_CVDY;
EvalTable[CVDG] = &Simulator::Evaluate_CVDG;
EvalTable[STRVG] = &Simulator::Evaluate_STRVG;
EvalTable[CGF] = &Simulator::Evaluate_CGF;
EvalTable[CLGF] = &Simulator::Evaluate_CLGF;
EvalTable[LTGF] = &Simulator::Evaluate_LTGF;
EvalTable[CGH] = &Simulator::Evaluate_CGH;
EvalTable[PFD] = &Simulator::Evaluate_PFD;
EvalTable[STRV] = &Simulator::Evaluate_STRV;
EvalTable[STRVH] = &Simulator::Evaluate_STRVH;
EvalTable[BCTG] = &Simulator::Evaluate_BCTG;
EvalTable[STY] = &Simulator::Evaluate_STY;
EvalTable[MSY] = &Simulator::Evaluate_MSY;
EvalTable[MSC] = &Simulator::Evaluate_MSC;
EvalTable[NY] = &Simulator::Evaluate_NY;
EvalTable[CLY] = &Simulator::Evaluate_CLY;
EvalTable[OY] = &Simulator::Evaluate_OY;
EvalTable[XY] = &Simulator::Evaluate_XY;
EvalTable[LY] = &Simulator::Evaluate_LY;
EvalTable[CY] = &Simulator::Evaluate_CY;
EvalTable[AY] = &Simulator::Evaluate_AY;
EvalTable[SY] = &Simulator::Evaluate_SY;
EvalTable[MFY] = &Simulator::Evaluate_MFY;
EvalTable[ALY] = &Simulator::Evaluate_ALY;
EvalTable[SLY] = &Simulator::Evaluate_SLY;
EvalTable[STHY] = &Simulator::Evaluate_STHY;
EvalTable[LAY] = &Simulator::Evaluate_LAY;
EvalTable[STCY] = &Simulator::Evaluate_STCY;
EvalTable[ICY] = &Simulator::Evaluate_ICY;
EvalTable[LAEY] = &Simulator::Evaluate_LAEY;
EvalTable[LB] = &Simulator::Evaluate_LB;
EvalTable[LGB] = &Simulator::Evaluate_LGB;
EvalTable[LHY] = &Simulator::Evaluate_LHY;
EvalTable[CHY] = &Simulator::Evaluate_CHY;
EvalTable[AHY] = &Simulator::Evaluate_AHY;
EvalTable[SHY] = &Simulator::Evaluate_SHY;
EvalTable[MHY] = &Simulator::Evaluate_MHY;
EvalTable[NG] = &Simulator::Evaluate_NG;
EvalTable[OG] = &Simulator::Evaluate_OG;
EvalTable[XG] = &Simulator::Evaluate_XG;
EvalTable[LGAT] = &Simulator::Evaluate_LGAT;
EvalTable[MLG] = &Simulator::Evaluate_MLG;
EvalTable[DLG] = &Simulator::Evaluate_DLG;
EvalTable[ALCG] = &Simulator::Evaluate_ALCG;
EvalTable[SLBG] = &Simulator::Evaluate_SLBG;
EvalTable[STPQ] = &Simulator::Evaluate_STPQ;
EvalTable[LPQ] = &Simulator::Evaluate_LPQ;
EvalTable[LLGC] = &Simulator::Evaluate_LLGC;
EvalTable[LLGH] = &Simulator::Evaluate_LLGH;
EvalTable[LLC] = &Simulator::Evaluate_LLC;
EvalTable[LLH] = &Simulator::Evaluate_LLH;
EvalTable[ML] = &Simulator::Evaluate_ML;
EvalTable[DL] = &Simulator::Evaluate_DL;
EvalTable[ALC] = &Simulator::Evaluate_ALC;
EvalTable[SLB] = &Simulator::Evaluate_SLB;
EvalTable[LLGTAT] = &Simulator::Evaluate_LLGTAT;
EvalTable[LLGFAT] = &Simulator::Evaluate_LLGFAT;
EvalTable[LAT] = &Simulator::Evaluate_LAT;
EvalTable[LBH] = &Simulator::Evaluate_LBH;
EvalTable[LLCH] = &Simulator::Evaluate_LLCH;
EvalTable[STCH] = &Simulator::Evaluate_STCH;
EvalTable[LHH] = &Simulator::Evaluate_LHH;
EvalTable[LLHH] = &Simulator::Evaluate_LLHH;
EvalTable[STHH] = &Simulator::Evaluate_STHH;
EvalTable[LFHAT] = &Simulator::Evaluate_LFHAT;
EvalTable[LFH] = &Simulator::Evaluate_LFH;
EvalTable[STFH] = &Simulator::Evaluate_STFH;
EvalTable[CHF] = &Simulator::Evaluate_CHF;
EvalTable[MVCDK] = &Simulator::Evaluate_MVCDK;
EvalTable[MVHHI] = &Simulator::Evaluate_MVHHI;
EvalTable[MVGHI] = &Simulator::Evaluate_MVGHI;
EvalTable[MVHI] = &Simulator::Evaluate_MVHI;
EvalTable[CHHSI] = &Simulator::Evaluate_CHHSI;
EvalTable[CGHSI] = &Simulator::Evaluate_CGHSI;
EvalTable[CHSI] = &Simulator::Evaluate_CHSI;
EvalTable[CLFHSI] = &Simulator::Evaluate_CLFHSI;
EvalTable[TBEGIN] = &Simulator::Evaluate_TBEGIN;
EvalTable[TBEGINC] = &Simulator::Evaluate_TBEGINC;
EvalTable[LMG] = &Simulator::Evaluate_LMG;
EvalTable[SRAG] = &Simulator::Evaluate_SRAG;
EvalTable[SLAG] = &Simulator::Evaluate_SLAG;
EvalTable[SRLG] = &Simulator::Evaluate_SRLG;
EvalTable[SLLG] = &Simulator::Evaluate_SLLG;
EvalTable[CSY] = &Simulator::Evaluate_CSY;
EvalTable[RLLG] = &Simulator::Evaluate_RLLG;
EvalTable[RLL] = &Simulator::Evaluate_RLL;
EvalTable[STMG] = &Simulator::Evaluate_STMG;
EvalTable[STMH] = &Simulator::Evaluate_STMH;
EvalTable[STCMH] = &Simulator::Evaluate_STCMH;
EvalTable[STCMY] = &Simulator::Evaluate_STCMY;
EvalTable[CDSY] = &Simulator::Evaluate_CDSY;
EvalTable[CDSG] = &Simulator::Evaluate_CDSG;
EvalTable[BXHG] = &Simulator::Evaluate_BXHG;
EvalTable[BXLEG] = &Simulator::Evaluate_BXLEG;
EvalTable[ECAG] = &Simulator::Evaluate_ECAG;
EvalTable[TMY] = &Simulator::Evaluate_TMY;
EvalTable[MVIY] = &Simulator::Evaluate_MVIY;
EvalTable[NIY] = &Simulator::Evaluate_NIY;
EvalTable[CLIY] = &Simulator::Evaluate_CLIY;
EvalTable[OIY] = &Simulator::Evaluate_OIY;
EvalTable[XIY] = &Simulator::Evaluate_XIY;
EvalTable[ASI] = &Simulator::Evaluate_ASI;
EvalTable[ALSI] = &Simulator::Evaluate_ALSI;
EvalTable[AGSI] = &Simulator::Evaluate_AGSI;
EvalTable[ALGSI] = &Simulator::Evaluate_ALGSI;
EvalTable[ICMH] = &Simulator::Evaluate_ICMH;
EvalTable[ICMY] = &Simulator::Evaluate_ICMY;
EvalTable[MVCLU] = &Simulator::Evaluate_MVCLU;
EvalTable[CLCLU] = &Simulator::Evaluate_CLCLU;
EvalTable[STMY] = &Simulator::Evaluate_STMY;
EvalTable[LMH] = &Simulator::Evaluate_LMH;
EvalTable[LMY] = &Simulator::Evaluate_LMY;
EvalTable[TP] = &Simulator::Evaluate_TP;
EvalTable[SRAK] = &Simulator::Evaluate_SRAK;
EvalTable[SLAK] = &Simulator::Evaluate_SLAK;
EvalTable[SRLK] = &Simulator::Evaluate_SRLK;
EvalTable[SLLK] = &Simulator::Evaluate_SLLK;
EvalTable[LOCG] = &Simulator::Evaluate_LOCG;
EvalTable[STOCG] = &Simulator::Evaluate_STOCG;
EvalTable[LANG] = &Simulator::Evaluate_LANG;
EvalTable[LAOG] = &Simulator::Evaluate_LAOG;
EvalTable[LAXG] = &Simulator::Evaluate_LAXG;
EvalTable[LAAG] = &Simulator::Evaluate_LAAG;
EvalTable[LAALG] = &Simulator::Evaluate_LAALG;
EvalTable[LOC] = &Simulator::Evaluate_LOC;
EvalTable[STOC] = &Simulator::Evaluate_STOC;
EvalTable[LAN] = &Simulator::Evaluate_LAN;
EvalTable[LAO] = &Simulator::Evaluate_LAO;
EvalTable[LAX] = &Simulator::Evaluate_LAX;
EvalTable[LAA] = &Simulator::Evaluate_LAA;
EvalTable[LAAL] = &Simulator::Evaluate_LAAL;
EvalTable[BRXHG] = &Simulator::Evaluate_BRXHG;
EvalTable[BRXLG] = &Simulator::Evaluate_BRXLG;
EvalTable[RISBLG] = &Simulator::Evaluate_RISBLG;
EvalTable[RNSBG] = &Simulator::Evaluate_RNSBG;
EvalTable[RISBG] = &Simulator::Evaluate_RISBG;
EvalTable[ROSBG] = &Simulator::Evaluate_ROSBG;
EvalTable[RXSBG] = &Simulator::Evaluate_RXSBG;
EvalTable[RISBGN] = &Simulator::Evaluate_RISBGN;
EvalTable[RISBHG] = &Simulator::Evaluate_RISBHG;
EvalTable[CGRJ] = &Simulator::Evaluate_CGRJ;
EvalTable[CGIT] = &Simulator::Evaluate_CGIT;
EvalTable[CIT] = &Simulator::Evaluate_CIT;
EvalTable[CLFIT] = &Simulator::Evaluate_CLFIT;
EvalTable[CGIJ] = &Simulator::Evaluate_CGIJ;
EvalTable[CIJ] = &Simulator::Evaluate_CIJ;
EvalTable[AHIK] = &Simulator::Evaluate_AHIK;
EvalTable[AGHIK] = &Simulator::Evaluate_AGHIK;
EvalTable[ALHSIK] = &Simulator::Evaluate_ALHSIK;
EvalTable[ALGHSIK] = &Simulator::Evaluate_ALGHSIK;
EvalTable[CGRB] = &Simulator::Evaluate_CGRB;
EvalTable[CGIB] = &Simulator::Evaluate_CGIB;
EvalTable[CIB] = &Simulator::Evaluate_CIB;
EvalTable[LDEB] = &Simulator::Evaluate_LDEB;
EvalTable[LXDB] = &Simulator::Evaluate_LXDB;
EvalTable[LXEB] = &Simulator::Evaluate_LXEB;
EvalTable[MXDB] = &Simulator::Evaluate_MXDB;
EvalTable[KEB] = &Simulator::Evaluate_KEB;
EvalTable[CEB] = &Simulator::Evaluate_CEB;
EvalTable[AEB] = &Simulator::Evaluate_AEB;
EvalTable[SEB] = &Simulator::Evaluate_SEB;
EvalTable[MDEB] = &Simulator::Evaluate_MDEB;
EvalTable[DEB] = &Simulator::Evaluate_DEB;
EvalTable[MAEB] = &Simulator::Evaluate_MAEB;
EvalTable[MSEB] = &Simulator::Evaluate_MSEB;
EvalTable[TCEB] = &Simulator::Evaluate_TCEB;
EvalTable[TCDB] = &Simulator::Evaluate_TCDB;
EvalTable[TCXB] = &Simulator::Evaluate_TCXB;
EvalTable[SQEB] = &Simulator::Evaluate_SQEB;
EvalTable[SQDB] = &Simulator::Evaluate_SQDB;
EvalTable[MEEB] = &Simulator::Evaluate_MEEB;
EvalTable[KDB] = &Simulator::Evaluate_KDB;
EvalTable[CDB] = &Simulator::Evaluate_CDB;
EvalTable[ADB] = &Simulator::Evaluate_ADB;
EvalTable[SDB] = &Simulator::Evaluate_SDB;
EvalTable[MDB] = &Simulator::Evaluate_MDB;
EvalTable[DDB] = &Simulator::Evaluate_DDB;
EvalTable[MADB] = &Simulator::Evaluate_MADB;
EvalTable[MSDB] = &Simulator::Evaluate_MSDB;
EvalTable[SLDT] = &Simulator::Evaluate_SLDT;
EvalTable[SRDT] = &Simulator::Evaluate_SRDT;
EvalTable[SLXT] = &Simulator::Evaluate_SLXT;
EvalTable[SRXT] = &Simulator::Evaluate_SRXT;
EvalTable[TDCET] = &Simulator::Evaluate_TDCET;
EvalTable[TDGET] = &Simulator::Evaluate_TDGET;
EvalTable[TDCDT] = &Simulator::Evaluate_TDCDT;
EvalTable[TDGDT] = &Simulator::Evaluate_TDGDT;
EvalTable[TDCXT] = &Simulator::Evaluate_TDCXT;
EvalTable[TDGXT] = &Simulator::Evaluate_TDGXT;
EvalTable[LEY] = &Simulator::Evaluate_LEY;
EvalTable[LDY] = &Simulator::Evaluate_LDY;
EvalTable[STEY] = &Simulator::Evaluate_STEY;
EvalTable[STDY] = &Simulator::Evaluate_STDY;
EvalTable[CZDT] = &Simulator::Evaluate_CZDT;
EvalTable[CZXT] = &Simulator::Evaluate_CZXT;
EvalTable[CDZT] = &Simulator::Evaluate_CDZT;
EvalTable[CXZT] = &Simulator::Evaluate_CXZT;
} // NOLINT
Simulator::Simulator(Isolate* isolate) : isolate_(isolate) {
i_cache_ = isolate_->simulator_i_cache();
if (i_cache_ == nullptr) {
i_cache_ = new base::CustomMatcherHashMap(&ICacheMatch);
isolate_->set_simulator_i_cache(i_cache_);
}
static base::OnceType once = V8_ONCE_INIT;
base::CallOnce(&once, &Simulator::EvalTableInit);
// Set up simulator support first. Some of this information is needed to
// setup the architecture state.
#if V8_TARGET_ARCH_S390X
size_t stack_size = FLAG_sim_stack_size * KB;
#else
size_t stack_size = MB; // allocate 1MB for stack
#endif
stack_size += 2 * stack_protection_size_;
stack_ = reinterpret_cast<char*>(malloc(stack_size));
pc_modified_ = false;
icount_ = 0;
break_pc_ = nullptr;
break_instr_ = 0;
// make sure our register type can hold exactly 4/8 bytes
#ifdef V8_TARGET_ARCH_S390X
DCHECK_EQ(sizeof(intptr_t), 8);
#else
DCHECK_EQ(sizeof(intptr_t), 4);
#endif
// Set up architecture state.
// All registers are initialized to zero to start with.
for (int i = 0; i < kNumGPRs; i++) {
registers_[i] = 0;
}
condition_reg_ = 0;
special_reg_pc_ = 0;
// Initializing FP registers.
for (int i = 0; i < kNumFPRs; i++) {
fp_registers_[i] = 0.0;
}
// The sp is initialized to point to the bottom (high address) of the
// allocated stack area. To be safe in potential stack underflows we leave
// some buffer below.
registers_[sp] =
reinterpret_cast<intptr_t>(stack_) + stack_size - stack_protection_size_;
last_debugger_input_ = nullptr;
}
Simulator::~Simulator() { free(stack_); }
// Get the active Simulator for the current thread.
Simulator* Simulator::current(Isolate* isolate) {
v8::internal::Isolate::PerIsolateThreadData* isolate_data =
isolate->FindOrAllocatePerThreadDataForThisThread();
DCHECK_NOT_NULL(isolate_data);
Simulator* sim = isolate_data->simulator();
if (sim == nullptr) {
// TODO(146): delete the simulator object when a thread/isolate goes away.
sim = new Simulator(isolate);
isolate_data->set_simulator(sim);
}
return sim;
}
// Sets the register in the architecture state.
void Simulator::set_register(int reg, uint64_t value) {
DCHECK((reg >= 0) && (reg < kNumGPRs));
registers_[reg] = value;
}
// Get the register from the architecture state.
uint64_t Simulator::get_register(int reg) const {
DCHECK((reg >= 0) && (reg < kNumGPRs));
// Stupid code added to avoid bug in GCC.
// See: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43949
if (reg >= kNumGPRs) return 0;
// End stupid code.
return registers_[reg];
}
template <typename T>
T Simulator::get_low_register(int reg) const {
DCHECK((reg >= 0) && (reg < kNumGPRs));
// Stupid code added to avoid bug in GCC.
// See: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43949
if (reg >= kNumGPRs) return 0;
// End stupid code.
return static_cast<T>(registers_[reg] & 0xFFFFFFFF);
}
template <typename T>
T Simulator::get_high_register(int reg) const {
DCHECK((reg >= 0) && (reg < kNumGPRs));
// Stupid code added to avoid bug in GCC.
// See: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43949
if (reg >= kNumGPRs) return 0;
// End stupid code.
return static_cast<T>(registers_[reg] >> 32);
}
void Simulator::set_low_register(int reg, uint32_t value) {
uint64_t shifted_val = static_cast<uint64_t>(value);
uint64_t orig_val = static_cast<uint64_t>(registers_[reg]);
uint64_t result = (orig_val >> 32 << 32) | shifted_val;
registers_[reg] = result;
}
void Simulator::set_high_register(int reg, uint32_t value) {
uint64_t shifted_val = static_cast<uint64_t>(value) << 32;
uint64_t orig_val = static_cast<uint64_t>(registers_[reg]);
uint64_t result = (orig_val & 0xFFFFFFFF) | shifted_val;
registers_[reg] = result;
}
double Simulator::get_double_from_register_pair(int reg) {
DCHECK((reg >= 0) && (reg < kNumGPRs) && ((reg % 2) == 0));
double dm_val = 0.0;
#if 0 && !V8_TARGET_ARCH_S390X // doesn't make sense in 64bit mode
// Read the bits from the unsigned integer register_[] array
// into the double precision floating point value and return it.
char buffer[sizeof(fp_registers_[0])];
memcpy(buffer, &registers_[reg], 2 * sizeof(registers_[0]));
memcpy(&dm_val, buffer, 2 * sizeof(registers_[0]));
#endif
return (dm_val);
}
// Raw access to the PC register.
void Simulator::set_pc(intptr_t value) {
pc_modified_ = true;
special_reg_pc_ = value;
}
bool Simulator::has_bad_pc() const {
return ((special_reg_pc_ == bad_lr) || (special_reg_pc_ == end_sim_pc));
}
// Raw access to the PC register without the special adjustment when reading.
intptr_t Simulator::get_pc() const { return special_reg_pc_; }
// Runtime FP routines take:
// - two double arguments
// - one double argument and zero or one integer arguments.
// All are consructed here from d1, d2 and r2.
void Simulator::GetFpArgs(double* x, double* y, intptr_t* z) {
*x = get_double_from_d_register(0);
*y = get_double_from_d_register(2);
*z = get_register(2);
}
// The return value is in d0.
void Simulator::SetFpResult(const double& result) {
set_d_register_from_double(0, result);
}
void Simulator::TrashCallerSaveRegisters() {
// We don't trash the registers with the return value.
#if 0 // A good idea to trash volatile registers, needs to be done
registers_[2] = 0x50BAD4U;
registers_[3] = 0x50BAD4U;
registers_[12] = 0x50BAD4U;
#endif
}
uint32_t Simulator::ReadWU(intptr_t addr, Instruction* instr) {
uint32_t* ptr = reinterpret_cast<uint32_t*>(addr);
return *ptr;
}
int64_t Simulator::ReadW64(intptr_t addr, Instruction* instr) {
int64_t* ptr = reinterpret_cast<int64_t*>(addr);
return *ptr;
}
int32_t Simulator::ReadW(intptr_t addr, Instruction* instr) {
int32_t* ptr = reinterpret_cast<int32_t*>(addr);
return *ptr;
}
void Simulator::WriteW(intptr_t addr, uint32_t value, Instruction* instr) {
uint32_t* ptr = reinterpret_cast<uint32_t*>(addr);
*ptr = value;
return;
}
void Simulator::WriteW(intptr_t addr, int32_t value, Instruction* instr) {
int32_t* ptr = reinterpret_cast<int32_t*>(addr);
*ptr = value;
return;
}
uint16_t Simulator::ReadHU(intptr_t addr, Instruction* instr) {
uint16_t* ptr = reinterpret_cast<uint16_t*>(addr);
return *ptr;
}
int16_t Simulator::ReadH(intptr_t addr, Instruction* instr) {
int16_t* ptr = reinterpret_cast<int16_t*>(addr);
return *ptr;
}
void Simulator::WriteH(intptr_t addr, uint16_t value, Instruction* instr) {
uint16_t* ptr = reinterpret_cast<uint16_t*>(addr);
*ptr = value;
return;
}
void Simulator::WriteH(intptr_t addr, int16_t value, Instruction* instr) {
int16_t* ptr = reinterpret_cast<int16_t*>(addr);
*ptr = value;
return;
}
uint8_t Simulator::ReadBU(intptr_t addr) {
uint8_t* ptr = reinterpret_cast<uint8_t*>(addr);
return *ptr;
}
int8_t Simulator::ReadB(intptr_t addr) {
int8_t* ptr = reinterpret_cast<int8_t*>(addr);
return *ptr;
}
void Simulator::WriteB(intptr_t addr, uint8_t value) {
uint8_t* ptr = reinterpret_cast<uint8_t*>(addr);
*ptr = value;
}
void Simulator::WriteB(intptr_t addr, int8_t value) {
int8_t* ptr = reinterpret_cast<int8_t*>(addr);
*ptr = value;
}
int64_t Simulator::ReadDW(intptr_t addr) {
int64_t* ptr = reinterpret_cast<int64_t*>(addr);
return *ptr;
}
void Simulator::WriteDW(intptr_t addr, int64_t value) {
int64_t* ptr = reinterpret_cast<int64_t*>(addr);
*ptr = value;
return;
}
/**
* Reads a double value from memory at given address.
*/
double Simulator::ReadDouble(intptr_t addr) {
double* ptr = reinterpret_cast<double*>(addr);
return *ptr;
}
float Simulator::ReadFloat(intptr_t addr) {
float* ptr = reinterpret_cast<float*>(addr);
return *ptr;
}
// Returns the limit of the stack area to enable checking for stack overflows.
uintptr_t Simulator::StackLimit(uintptr_t c_limit) const {
// The simulator uses a separate JS stack. If we have exhausted the C stack,
// we also drop down the JS limit to reflect the exhaustion on the JS stack.
if (GetCurrentStackPosition() < c_limit) {
return reinterpret_cast<uintptr_t>(get_sp());
}
// Otherwise the limit is the JS stack. Leave a safety margin to prevent
// overrunning the stack when pushing values.
return reinterpret_cast<uintptr_t>(stack_) + stack_protection_size_;
}
// Unsupported instructions use Format to print an error and stop execution.
void Simulator::Format(Instruction* instr, const char* format) {
PrintF("Simulator found unsupported instruction:\n 0x%08" V8PRIxPTR ": %s\n",
reinterpret_cast<intptr_t>(instr), format);
UNIMPLEMENTED();
}
// Calculate C flag value for additions.
bool Simulator::CarryFrom(int32_t left, int32_t right, int32_t carry) {
uint32_t uleft = static_cast<uint32_t>(left);
uint32_t uright = static_cast<uint32_t>(right);
uint32_t urest = 0xFFFFFFFFU - uleft;
return (uright > urest) ||
(carry && (((uright + 1) > urest) || (uright > (urest - 1))));
}
// Calculate C flag value for subtractions.
bool Simulator::BorrowFrom(int32_t left, int32_t right) {
uint32_t uleft = static_cast<uint32_t>(left);
uint32_t uright = static_cast<uint32_t>(right);
return (uright > uleft);
}
// Calculate V flag value for additions and subtractions.
template <typename T1>
bool Simulator::OverflowFromSigned(T1 alu_out, T1 left, T1 right,
bool addition) {
bool overflow;
if (addition) {
// operands have the same sign
overflow = ((left >= 0 && right >= 0) || (left < 0 && right < 0))
// and operands and result have different sign
&& ((left < 0 && alu_out >= 0) || (left >= 0 && alu_out < 0));
} else {
// operands have different signs
overflow = ((left < 0 && right >= 0) || (left >= 0 && right < 0))
// and first operand and result have different signs
&& ((left < 0 && alu_out >= 0) || (left >= 0 && alu_out < 0));
}
return overflow;
}
#if V8_TARGET_ARCH_S390X
static void decodeObjectPair(ObjectPair* pair, intptr_t* x, intptr_t* y) {
*x = reinterpret_cast<intptr_t>(pair->x);
*y = reinterpret_cast<intptr_t>(pair->y);
}
#else
static void decodeObjectPair(ObjectPair* pair, intptr_t* x, intptr_t* y) {
#if V8_TARGET_BIG_ENDIAN
*x = static_cast<int32_t>(*pair >> 32);
*y = static_cast<int32_t>(*pair);
#else
*x = static_cast<int32_t>(*pair);
*y = static_cast<int32_t>(*pair >> 32);
#endif
}
#endif
// Calls into the V8 runtime.
typedef intptr_t (*SimulatorRuntimeCall)(intptr_t arg0, intptr_t arg1,
intptr_t arg2, intptr_t arg3,
intptr_t arg4, intptr_t arg5,
intptr_t arg6, intptr_t arg7,
intptr_t arg8);
typedef ObjectPair (*SimulatorRuntimePairCall)(intptr_t arg0, intptr_t arg1,
intptr_t arg2, intptr_t arg3,
intptr_t arg4, intptr_t arg5);
// These prototypes handle the four types of FP calls.
typedef int (*SimulatorRuntimeCompareCall)(double darg0, double darg1);
typedef double (*SimulatorRuntimeFPFPCall)(double darg0, double darg1);
typedef double (*SimulatorRuntimeFPCall)(double darg0);
typedef double (*SimulatorRuntimeFPIntCall)(double darg0, intptr_t arg0);
// This signature supports direct call in to API function native callback
// (refer to InvocationCallback in v8.h).
typedef void (*SimulatorRuntimeDirectApiCall)(intptr_t arg0);
typedef void (*SimulatorRuntimeProfilingApiCall)(intptr_t arg0, void* arg1);
// This signature supports direct call to accessor getter callback.
typedef void (*SimulatorRuntimeDirectGetterCall)(intptr_t arg0, intptr_t arg1);
typedef void (*SimulatorRuntimeProfilingGetterCall)(intptr_t arg0,
intptr_t arg1, void* arg2);
// Software interrupt instructions are used by the simulator to call into the
// C-based V8 runtime.
void Simulator::SoftwareInterrupt(Instruction* instr) {
int svc = instr->SvcValue();
switch (svc) {
case kCallRtRedirected: {
// Check if stack is aligned. Error if not aligned is reported below to
// include information on the function called.
bool stack_aligned =
(get_register(sp) & (::v8::internal::FLAG_sim_stack_alignment - 1)) ==
0;
Redirection* redirection = Redirection::FromInstruction(instr);
const int kArgCount = 9;
const int kRegisterArgCount = 5;
int arg0_regnum = 2;
intptr_t result_buffer = 0;
bool uses_result_buffer =
redirection->type() == ExternalReference::BUILTIN_CALL_PAIR &&
!ABI_RETURNS_OBJECTPAIR_IN_REGS;
if (uses_result_buffer) {
result_buffer = get_register(r2);
arg0_regnum++;
}
intptr_t arg[kArgCount];
// First 5 arguments in registers r2-r6.
for (int i = 0; i < kRegisterArgCount; i++) {
arg[i] = get_register(arg0_regnum + i);
}
// Remaining arguments on stack
intptr_t* stack_pointer = reinterpret_cast<intptr_t*>(get_register(sp));
for (int i = kRegisterArgCount; i < kArgCount; i++) {
arg[i] = stack_pointer[(kCalleeRegisterSaveAreaSize / kPointerSize) +
(i - kRegisterArgCount)];
}
STATIC_ASSERT(kArgCount == kRegisterArgCount + 4);
STATIC_ASSERT(kMaxCParameters == 9);
bool fp_call =
(redirection->type() == ExternalReference::BUILTIN_FP_FP_CALL) ||
(redirection->type() == ExternalReference::BUILTIN_COMPARE_CALL) ||
(redirection->type() == ExternalReference::BUILTIN_FP_CALL) ||
(redirection->type() == ExternalReference::BUILTIN_FP_INT_CALL);
// Place the return address on the stack, making the call GC safe.
*reinterpret_cast<intptr_t*>(get_register(sp) +
kStackFrameRASlot * kPointerSize) =
get_register(r14);
intptr_t external =
reinterpret_cast<intptr_t>(redirection->external_function());
if (fp_call) {
double dval0, dval1; // one or two double parameters
intptr_t ival; // zero or one integer parameters
int iresult = 0; // integer return value
double dresult = 0; // double return value
GetFpArgs(&dval0, &dval1, &ival);
if (::v8::internal::FLAG_trace_sim || !stack_aligned) {
SimulatorRuntimeCall generic_target =
reinterpret_cast<SimulatorRuntimeCall>(external);
switch (redirection->type()) {
case ExternalReference::BUILTIN_FP_FP_CALL:
case ExternalReference::BUILTIN_COMPARE_CALL:
PrintF("Call to host function at %p with args %f, %f",
static_cast<void*>(FUNCTION_ADDR(generic_target)), dval0,
dval1);
break;
case ExternalReference::BUILTIN_FP_CALL:
PrintF("Call to host function at %p with arg %f",
static_cast<void*>(FUNCTION_ADDR(generic_target)), dval0);
break;
case ExternalReference::BUILTIN_FP_INT_CALL:
PrintF("Call to host function at %p with args %f, %" V8PRIdPTR,
static_cast<void*>(FUNCTION_ADDR(generic_target)), dval0,
ival);
break;
default:
UNREACHABLE();
break;
}
if (!stack_aligned) {
PrintF(" with unaligned stack %08" V8PRIxPTR "\n",
static_cast<intptr_t>(get_register(sp)));
}
PrintF("\n");
}
CHECK(stack_aligned);
switch (redirection->type()) {
case ExternalReference::BUILTIN_COMPARE_CALL: {
SimulatorRuntimeCompareCall target =
reinterpret_cast<SimulatorRuntimeCompareCall>(external);
iresult = target(dval0, dval1);
set_register(r2, iresult);
break;
}
case ExternalReference::BUILTIN_FP_FP_CALL: {
SimulatorRuntimeFPFPCall target =
reinterpret_cast<SimulatorRuntimeFPFPCall>(external);
dresult = target(dval0, dval1);
SetFpResult(dresult);
break;
}
case ExternalReference::BUILTIN_FP_CALL: {
SimulatorRuntimeFPCall target =
reinterpret_cast<SimulatorRuntimeFPCall>(external);
dresult = target(dval0);
SetFpResult(dresult);
break;
}
case ExternalReference::BUILTIN_FP_INT_CALL: {
SimulatorRuntimeFPIntCall target =
reinterpret_cast<SimulatorRuntimeFPIntCall>(external);
dresult = target(dval0, ival);
SetFpResult(dresult);
break;
}
default:
UNREACHABLE();
break;
}
if (::v8::internal::FLAG_trace_sim || !stack_aligned) {
switch (redirection->type()) {
case ExternalReference::BUILTIN_COMPARE_CALL:
PrintF("Returned %08x\n", iresult);
break;
case ExternalReference::BUILTIN_FP_FP_CALL:
case ExternalReference::BUILTIN_FP_CALL:
case ExternalReference::BUILTIN_FP_INT_CALL:
PrintF("Returned %f\n", dresult);
break;
default:
UNREACHABLE();
break;
}
}
} else if (redirection->type() == ExternalReference::DIRECT_API_CALL) {
// See callers of MacroAssembler::CallApiFunctionAndReturn for
// explanation of register usage.
if (::v8::internal::FLAG_trace_sim || !stack_aligned) {
PrintF("Call to host function at %p args %08" V8PRIxPTR,
reinterpret_cast<void*>(external), arg[0]);
if (!stack_aligned) {
PrintF(" with unaligned stack %08" V8PRIxPTR "\n",
static_cast<intptr_t>(get_register(sp)));
}
PrintF("\n");
}
CHECK(stack_aligned);
SimulatorRuntimeDirectApiCall target =
reinterpret_cast<SimulatorRuntimeDirectApiCall>(external);
target(arg[0]);
} else if (redirection->type() == ExternalReference::PROFILING_API_CALL) {
// See callers of MacroAssembler::CallApiFunctionAndReturn for
// explanation of register usage.
if (::v8::internal::FLAG_trace_sim || !stack_aligned) {
PrintF("Call to host function at %p args %08" V8PRIxPTR
" %08" V8PRIxPTR,
reinterpret_cast<void*>(external), arg[0], arg[1]);
if (!stack_aligned) {
PrintF(" with unaligned stack %08" V8PRIxPTR "\n",
static_cast<intptr_t>(get_register(sp)));
}
PrintF("\n");
}
CHECK(stack_aligned);
SimulatorRuntimeProfilingApiCall target =
reinterpret_cast<SimulatorRuntimeProfilingApiCall>(external);
target(arg[0], Redirection::ReverseRedirection(arg[1]));
} else if (redirection->type() == ExternalReference::DIRECT_GETTER_CALL) {
// See callers of MacroAssembler::CallApiFunctionAndReturn for
// explanation of register usage.
if (::v8::internal::FLAG_trace_sim || !stack_aligned) {
PrintF("Call to host function at %p args %08" V8PRIxPTR
" %08" V8PRIxPTR,
reinterpret_cast<void*>(external), arg[0], arg[1]);
if (!stack_aligned) {
PrintF(" with unaligned stack %08" V8PRIxPTR "\n",
static_cast<intptr_t>(get_register(sp)));
}
PrintF("\n");
}
CHECK(stack_aligned);
SimulatorRuntimeDirectGetterCall target =
reinterpret_cast<SimulatorRuntimeDirectGetterCall>(external);
if (!ABI_PASSES_HANDLES_IN_REGS) {
arg[0] = *(reinterpret_cast<intptr_t*>(arg[0]));
}
target(arg[0], arg[1]);
} else if (redirection->type() ==
ExternalReference::PROFILING_GETTER_CALL) {
if (::v8::internal::FLAG_trace_sim || !stack_aligned) {
PrintF("Call to host function at %p args %08" V8PRIxPTR
" %08" V8PRIxPTR " %08" V8PRIxPTR,
reinterpret_cast<void*>(external), arg[0], arg[1], arg[2]);
if (!stack_aligned) {
PrintF(" with unaligned stack %08" V8PRIxPTR "\n",
static_cast<intptr_t>(get_register(sp)));
}
PrintF("\n");
}
CHECK(stack_aligned);
SimulatorRuntimeProfilingGetterCall target =
reinterpret_cast<SimulatorRuntimeProfilingGetterCall>(external);
if (!ABI_PASSES_HANDLES_IN_REGS) {
arg[0] = *(reinterpret_cast<intptr_t*>(arg[0]));
}
target(arg[0], arg[1], Redirection::ReverseRedirection(arg[2]));
} else {
// builtin call.
if (::v8::internal::FLAG_trace_sim || !stack_aligned) {
SimulatorRuntimeCall target =
reinterpret_cast<SimulatorRuntimeCall>(external);
PrintF(
"Call to host function at %p,\n"
"\t\t\t\targs %08" V8PRIxPTR ", %08" V8PRIxPTR ", %08" V8PRIxPTR
", %08" V8PRIxPTR ", %08" V8PRIxPTR ", %08" V8PRIxPTR
", %08" V8PRIxPTR ", %08" V8PRIxPTR ", %08" V8PRIxPTR,
static_cast<void*>(FUNCTION_ADDR(target)), arg[0], arg[1], arg[2],
arg[3], arg[4], arg[5], arg[6], arg[7], arg[8]);
if (!stack_aligned) {
PrintF(" with unaligned stack %08" V8PRIxPTR "\n",
static_cast<intptr_t>(get_register(sp)));
}
PrintF("\n");
}
CHECK(stack_aligned);
if (redirection->type() == ExternalReference::BUILTIN_CALL_PAIR) {
SimulatorRuntimePairCall target =
reinterpret_cast<SimulatorRuntimePairCall>(external);
ObjectPair result =
target(arg[0], arg[1], arg[2], arg[3], arg[4], arg[5]);
intptr_t x;
intptr_t y;
decodeObjectPair(&result, &x, &y);
if (::v8::internal::FLAG_trace_sim) {
PrintF("Returned {%08" V8PRIxPTR ", %08" V8PRIxPTR "}\n", x, y);
}
if (ABI_RETURNS_OBJECTPAIR_IN_REGS) {
set_register(r2, x);
set_register(r3, y);
} else {
memcpy(reinterpret_cast<void*>(result_buffer), &result,
sizeof(ObjectPair));
set_register(r2, result_buffer);
}
} else {
DCHECK(redirection->type() == ExternalReference::BUILTIN_CALL);
SimulatorRuntimeCall target =
reinterpret_cast<SimulatorRuntimeCall>(external);
intptr_t result = target(arg[0], arg[1], arg[2], arg[3], arg[4],
arg[5], arg[6], arg[7], arg[8]);
if (::v8::internal::FLAG_trace_sim) {
PrintF("Returned %08" V8PRIxPTR "\n", result);
}
set_register(r2