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ac9ac065c5083565917b15e7a672a79599f2f00b
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src
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llvm-project
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llvm
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test
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CodeGen
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AArch64
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arm64-fp.ll
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; RUN: llc < %s -mtriple=arm64-eabi | FileCheck %s
define
float
@t1
(
i1
%a
,
float
%b
,
float
%c
)
nounwind
{
; CHECK: t1
; CHECK: fcsel s0, s0, s1, ne
%sel
=
select
i1
%a
,
float
%b
,
float
%c
ret
float
%sel
}