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llvm-project
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llvm
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test
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CodeGen
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AArch64
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arm64-zext.ll
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; RUN: llc < %s -mtriple=arm64-eabi | FileCheck %s
define
i64
@foo
(
i32
%a
,
i32
%b
)
nounwind
readnone
ssp
{
entry
:
; CHECK-LABEL: foo:
; CHECK: add w0, w1, w0
; CHECK: ret
%add
=
add
i32
%b
,
%a
%conv
=
zext
i32
%add
to
i64
ret
i64
%conv
}