| # RUN: not llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8.3a,-fullfp16 --disassemble < %s 2>%t | FileCheck %s --check-prefix=CHECK |
| # RUN: FileCheck %s < %t --check-prefix=NO-FP16 |
| # RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8.3a,+fullfp16 --disassemble < %s 2>%t | FileCheck %s --check-prefix=CHECK --check-prefix=FP16 |
| # RUN: not llvm-mc -triple aarch64-none-linux-gnu -mattr=-v8.3a,+fullfp16 --disassemble < %s 2>&1 | FileCheck %s --check-prefix=NO-V83A |
| |
| ###### FCMLA vector |
| [0x20,0xc4,0x42,0x2e] |
| # FP16: fcmla v0.4h, v1.4h, v2.4h, #0 |
| # NO-FP16: :[[@LINE-2]]:{{[0-9]*}}: warning: invalid instruction encoding |
| # NO-V83A: :[[@LINE-3]]:{{[0-9]*}}: warning: invalid instruction encoding |
| [0x20,0xc4,0x42,0x6e] |
| # FP16: fcmla v0.8h, v1.8h, v2.8h, #0 |
| # NO-FP16: :[[@LINE-2]]:{{[0-9]*}}: warning: invalid instruction encoding |
| # NO-V83A: :[[@LINE-3]]:{{[0-9]*}}: warning: invalid instruction encoding |
| [0x20,0xc4,0x82,0x2e] |
| # CHECK: fcmla v0.2s, v1.2s, v2.2s, #0 |
| # NO-V83A: :[[@LINE-2]]:{{[0-9]*}}: warning: invalid instruction encoding |
| [0x20,0xc4,0x82,0x6e] |
| # CHECK: fcmla v0.4s, v1.4s, v2.4s, #0 |
| # NO-V83A: :[[@LINE-2]]:{{[0-9]*}}: warning: invalid instruction encoding |
| [0x20,0xc4,0xc2,0x6e] |
| # CHECK: fcmla v0.2d, v1.2d, v2.2d, #0 |
| # NO-V83A: :[[@LINE-2]]:{{[0-9]*}}: warning: invalid instruction encoding |
| |
| |
| [0x20,0xc4,0x82,0x2e] |
| # CHECK: fcmla v0.2s, v1.2s, v2.2s, #0 |
| # NO-V83A: :[[@LINE-2]]:{{[0-9]*}}: warning: invalid instruction encoding |
| [0x20,0xcc,0x82,0x2e] |
| # CHECK: fcmla v0.2s, v1.2s, v2.2s, #90 |
| # NO-V83A: :[[@LINE-2]]:{{[0-9]*}}: warning: invalid instruction encoding |
| [0x20,0xd4,0x82,0x2e] |
| # CHECK: fcmla v0.2s, v1.2s, v2.2s, #180 |
| # NO-V83A: :[[@LINE-2]]:{{[0-9]*}}: warning: invalid instruction encoding |
| [0x20,0xdc,0x82,0x2e] |
| # CHECK: fcmla v0.2s, v1.2s, v2.2s, #270 |
| # NO-V83A: :[[@LINE-2]]:{{[0-9]*}}: warning: invalid instruction encoding |
| |
| |
| ###### FCADD vector |
| [0x20,0xe4,0x42,0x2e] |
| # FP16: fcadd v0.4h, v1.4h, v2.4h, #90 |
| # NO-FP16: :[[@LINE-2]]:{{[0-9]*}}: warning: invalid instruction encoding |
| # NO-V83A: :[[@LINE-3]]:{{[0-9]*}}: warning: invalid instruction encoding |
| [0x20,0xe4,0x42,0x6e] |
| # FP16: fcadd v0.8h, v1.8h, v2.8h, #90 |
| # NO-FP16: :[[@LINE-2]]:{{[0-9]*}}: warning: invalid instruction encoding |
| # NO-V83A: :[[@LINE-3]]:{{[0-9]*}}: warning: invalid instruction encoding |
| [0x20,0xe4,0x82,0x2e] |
| # CHECK: fcadd v0.2s, v1.2s, v2.2s, #90 |
| # NO-V83A: :[[@LINE-2]]:{{[0-9]*}}: warning: invalid instruction encoding |
| [0x20,0xe4,0x82,0x6e] |
| # CHECK: fcadd v0.4s, v1.4s, v2.4s, #90 |
| # NO-V83A: :[[@LINE-2]]:{{[0-9]*}}: warning: invalid instruction encoding |
| [0x20,0xe4,0xc2,0x6e] |
| # CHECK: fcadd v0.2d, v1.2d, v2.2d, #90 |
| # NO-V83A: :[[@LINE-2]]:{{[0-9]*}}: warning: invalid instruction encoding |
| |
| |
| [0x20,0xe4,0x82,0x2e] |
| # CHECK: fcadd v0.2s, v1.2s, v2.2s, #90 |
| # NO-V83A: :[[@LINE-2]]:{{[0-9]*}}: warning: invalid instruction encoding |
| [0x20,0xf4,0x82,0x2e] |
| # CHECK: fcadd v0.2s, v1.2s, v2.2s, #270 |
| # NO-V83A: :[[@LINE-2]]:{{[0-9]*}}: warning: invalid instruction encoding |
| |
| [0x20,0x10,0x42,0x2f] |
| # FP16: fcmla v0.4h, v1.4h, v2.h[0], #0 |
| # NO-FP16: :[[@LINE-2]]:{{[0-9]*}}: warning: invalid instruction encoding |
| # NO-V83A: :[[@LINE-3]]:{{[0-9]*}}: warning: invalid instruction encoding |
| [0x20,0x10,0x42,0x6f] |
| # FP16: fcmla v0.8h, v1.8h, v2.h[0], #0 |
| # NO-FP16: :[[@LINE-2]]:{{[0-9]*}}: warning: invalid instruction encoding |
| # NO-V83A: :[[@LINE-3]]:{{[0-9]*}}: warning: invalid instruction encoding |
| [0x20,0x10,0x82,0x6f] |
| # CHECK: fcmla v0.4s, v1.4s, v2.s[0], #0 |
| # NO-V83A: :[[@LINE-2]]:{{[0-9]*}}: warning: invalid instruction encoding |
| |
| |
| [0x20,0x30,0x82,0x6f] |
| # CHECK: fcmla v0.4s, v1.4s, v2.s[0], #90 |
| # NO-V83A: :[[@LINE-2]]:{{[0-9]*}}: warning: invalid instruction encoding |
| [0x20,0x50,0x82,0x6f] |
| # CHECK: fcmla v0.4s, v1.4s, v2.s[0], #180 |
| # NO-V83A: :[[@LINE-2]]:{{[0-9]*}}: warning: invalid instruction encoding |
| [0x20,0x70,0x82,0x6f] |
| # CHECK: fcmla v0.4s, v1.4s, v2.s[0], #270 |
| # NO-V83A: :[[@LINE-2]]:{{[0-9]*}}: warning: invalid instruction encoding |
| |
| |
| [0x20,0x10,0x62,0x2f] |
| # FP16: fcmla v0.4h, v1.4h, v2.h[1], #0 |
| # NO-FP16: :[[@LINE-2]]:{{[0-9]*}}: warning: invalid instruction encoding |
| # NO-V83A: :[[@LINE-3]]:{{[0-9]*}}: warning: invalid instruction encoding |
| [0x20,0x18,0x62,0x6f] |
| # FP16: fcmla v0.8h, v1.8h, v2.h[3], #0 |
| # NO-FP16: :[[@LINE-2]]:{{[0-9]*}}: warning: invalid instruction encoding |
| # NO-V83A: :[[@LINE-3]]:{{[0-9]*}}: warning: invalid instruction encoding |
| [0x20,0x18,0x82,0x6f] |
| # CHECK: fcmla v0.4s, v1.4s, v2.s[1], #0 |
| # NO-V83A: :[[@LINE-2]]:{{[0-9]*}}: warning: invalid instruction encoding |