src/third_party/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bitcast.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer %s -o - | FileCheck %s

--- |
  define void @test_bitcast() { ret void }
...

---
name:            test_bitcast
registers:
  - { id: 0, class: _ }
  - { id: 1, class: _ }
  - { id: 2, class: _ }
body: |
  bb.0:
    liveins: $vgpr0

    ; CHECK-LABEL: name: test_bitcast
    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; CHECK: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY]](s32)
    ; CHECK: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[BITCAST]](<2 x s16>)
    %0(s32) = COPY $vgpr0
    %1(<2 x s16>) = G_BITCAST %0
    %2(s32) = G_BITCAST %1
    $vgpr0 = COPY %2
...