| // Copyright 2017 the V8 project authors. All rights reserved. |
| // Use of this source code is governed by a BSD-style license that can be |
| // found in the LICENSE file. |
| |
| #ifndef V8_WASM_BASELINE_PPC_LIFTOFF_ASSEMBLER_PPC_H_ |
| #define V8_WASM_BASELINE_PPC_LIFTOFF_ASSEMBLER_PPC_H_ |
| |
| #include "src/wasm/baseline/liftoff-assembler.h" |
| |
| |
| namespace v8 { |
| namespace internal { |
| namespace wasm { |
| |
| namespace liftoff { |
| |
| // half |
| // slot Frame |
| // -----+--------------------+--------------------------- |
| // n+3 | parameter n | |
| // ... | ... | |
| // 4 | parameter 1 | or parameter 2 |
| // 3 | parameter 0 | or parameter 1 |
| // 2 | (result address) | or parameter 0 |
| // -----+--------------------+--------------------------- |
| // 1 | return addr (lr) | |
| // 0 | previous frame (fp)| |
| // -----+--------------------+ <-- frame ptr (fp) |
| // -1 | 0xa: WASM | |
| // -2 | instance | |
| // -----+--------------------+--------------------------- |
| // -3 | slot 0 (high) | ^ |
| // -4 | slot 0 (low) | | |
| // -5 | slot 1 (high) | Frame slots |
| // -6 | slot 1 (low) | | |
| // | | v |
| // -----+--------------------+ <-- stack ptr (sp) |
| // |
| |
| constexpr int32_t kInstanceOffset = 2 * kSystemPointerSize; |
| |
| inline MemOperand GetHalfStackSlot(int offset, RegPairHalf half) { |
| int32_t half_offset = |
| half == kLowWord ? 0 : LiftoffAssembler::kStackSlotSize / 2; |
| return MemOperand(fp, -kInstanceOffset - offset + half_offset); |
| } |
| |
| } // namespace liftoff |
| |
| int LiftoffAssembler::PrepareStackFrame() { |
| bailout(kUnsupportedArchitecture, "PrepareStackFrame"); |
| return 0; |
| } |
| |
| void LiftoffAssembler::PrepareTailCall(int num_callee_stack_params, |
| int stack_param_delta) { |
| bailout(kUnsupportedArchitecture, "PrepareTailCall"); |
| } |
| |
| void LiftoffAssembler::PatchPrepareStackFrame(int offset, int frame_size) { |
| bailout(kUnsupportedArchitecture, "PatchPrepareStackFrame"); |
| } |
| |
| void LiftoffAssembler::FinishCode() { EmitConstantPool(); } |
| |
| void LiftoffAssembler::AbortCompilation() { FinishCode(); } |
| |
| // static |
| constexpr int LiftoffAssembler::StaticStackFrameSize() { |
| return liftoff::kInstanceOffset; |
| } |
| |
| int LiftoffAssembler::SlotSizeForType(ValueType type) { |
| switch (type.kind()) { |
| case ValueType::kS128: |
| return type.element_size_bytes(); |
| default: |
| return kStackSlotSize; |
| } |
| } |
| |
| bool LiftoffAssembler::NeedsAlignment(ValueType type) { |
| return (type.kind() == ValueType::kS128 || type.is_reference_type()); |
| } |
| |
| void LiftoffAssembler::LoadConstant(LiftoffRegister reg, WasmValue value, |
| RelocInfo::Mode rmode) { |
| bailout(kUnsupportedArchitecture, "LoadConstant"); |
| } |
| |
| void LiftoffAssembler::LoadFromInstance(Register dst, int offset, int size) { |
| bailout(kUnsupportedArchitecture, "LoadFromInstance"); |
| } |
| |
| void LiftoffAssembler::LoadTaggedPointerFromInstance(Register dst, int offset) { |
| bailout(kUnsupportedArchitecture, "LoadTaggedPointerFromInstance"); |
| } |
| |
| void LiftoffAssembler::SpillInstance(Register instance) { |
| bailout(kUnsupportedArchitecture, "SpillInstance"); |
| } |
| |
| void LiftoffAssembler::FillInstanceInto(Register dst) { |
| bailout(kUnsupportedArchitecture, "FillInstanceInto"); |
| } |
| |
| void LiftoffAssembler::LoadTaggedPointer(Register dst, Register src_addr, |
| Register offset_reg, |
| int32_t offset_imm, |
| LiftoffRegList pinned) { |
| bailout(kUnsupportedArchitecture, "LoadTaggedPointer"); |
| } |
| |
| void LiftoffAssembler::StoreTaggedPointer(Register dst_addr, |
| int32_t offset_imm, |
| LiftoffRegister src, |
| LiftoffRegList pinned) { |
| bailout(kRefTypes, "GlobalSet"); |
| } |
| |
| void LiftoffAssembler::Load(LiftoffRegister dst, Register src_addr, |
| Register offset_reg, uint32_t offset_imm, |
| LoadType type, LiftoffRegList pinned, |
| uint32_t* protected_load_pc, bool is_load_mem) { |
| bailout(kUnsupportedArchitecture, "Load"); |
| } |
| |
| void LiftoffAssembler::Store(Register dst_addr, Register offset_reg, |
| uint32_t offset_imm, LiftoffRegister src, |
| StoreType type, LiftoffRegList pinned, |
| uint32_t* protected_store_pc, bool is_store_mem) { |
| bailout(kUnsupportedArchitecture, "Store"); |
| } |
| |
| void LiftoffAssembler::AtomicLoad(LiftoffRegister dst, Register src_addr, |
| Register offset_reg, uint32_t offset_imm, |
| LoadType type, LiftoffRegList pinned) { |
| bailout(kAtomics, "AtomicLoad"); |
| } |
| |
| void LiftoffAssembler::AtomicStore(Register dst_addr, Register offset_reg, |
| uint32_t offset_imm, LiftoffRegister src, |
| StoreType type, LiftoffRegList pinned) { |
| bailout(kAtomics, "AtomicStore"); |
| } |
| |
| void LiftoffAssembler::AtomicAdd(Register dst_addr, Register offset_reg, |
| uint32_t offset_imm, LiftoffRegister value, |
| LiftoffRegister result, StoreType type) { |
| bailout(kAtomics, "AtomicAdd"); |
| } |
| |
| void LiftoffAssembler::AtomicSub(Register dst_addr, Register offset_reg, |
| uint32_t offset_imm, LiftoffRegister value, |
| LiftoffRegister result, StoreType type) { |
| bailout(kAtomics, "AtomicSub"); |
| } |
| |
| void LiftoffAssembler::AtomicAnd(Register dst_addr, Register offset_reg, |
| uint32_t offset_imm, LiftoffRegister value, |
| LiftoffRegister result, StoreType type) { |
| bailout(kAtomics, "AtomicAnd"); |
| } |
| |
| void LiftoffAssembler::AtomicOr(Register dst_addr, Register offset_reg, |
| uint32_t offset_imm, LiftoffRegister value, |
| LiftoffRegister result, StoreType type) { |
| bailout(kAtomics, "AtomicOr"); |
| } |
| |
| void LiftoffAssembler::AtomicXor(Register dst_addr, Register offset_reg, |
| uint32_t offset_imm, LiftoffRegister value, |
| LiftoffRegister result, StoreType type) { |
| bailout(kAtomics, "AtomicXor"); |
| } |
| |
| void LiftoffAssembler::AtomicExchange(Register dst_addr, Register offset_reg, |
| uint32_t offset_imm, |
| LiftoffRegister value, |
| LiftoffRegister result, StoreType type) { |
| bailout(kAtomics, "AtomicExchange"); |
| } |
| |
| void LiftoffAssembler::AtomicCompareExchange( |
| Register dst_addr, Register offset_reg, uint32_t offset_imm, |
| LiftoffRegister expected, LiftoffRegister new_value, LiftoffRegister result, |
| StoreType type) { |
| bailout(kAtomics, "AtomicCompareExchange"); |
| } |
| |
| void LiftoffAssembler::AtomicFence() { sync(); } |
| |
| void LiftoffAssembler::LoadCallerFrameSlot(LiftoffRegister dst, |
| uint32_t caller_slot_idx, |
| ValueType type) { |
| bailout(kUnsupportedArchitecture, "LoadCallerFrameSlot"); |
| } |
| |
| void LiftoffAssembler::StoreCallerFrameSlot(LiftoffRegister src, |
| uint32_t caller_slot_idx, |
| ValueType type) { |
| bailout(kUnsupportedArchitecture, "StoreCallerFrameSlot"); |
| } |
| |
| void LiftoffAssembler::LoadReturnStackSlot(LiftoffRegister dst, int offset, |
| ValueType type) { |
| bailout(kUnsupportedArchitecture, "LoadReturnStackSlot"); |
| } |
| |
| void LiftoffAssembler::MoveStackValue(uint32_t dst_offset, uint32_t src_offset, |
| ValueType type) { |
| bailout(kUnsupportedArchitecture, "MoveStackValue"); |
| } |
| |
| void LiftoffAssembler::Move(Register dst, Register src, ValueType type) { |
| bailout(kUnsupportedArchitecture, "Move Register"); |
| } |
| |
| void LiftoffAssembler::Move(DoubleRegister dst, DoubleRegister src, |
| ValueType type) { |
| bailout(kUnsupportedArchitecture, "Move DoubleRegister"); |
| } |
| |
| void LiftoffAssembler::Spill(int offset, LiftoffRegister reg, ValueType type) { |
| bailout(kUnsupportedArchitecture, "Spill register"); |
| } |
| |
| void LiftoffAssembler::Spill(int offset, WasmValue value) { |
| bailout(kUnsupportedArchitecture, "Spill value"); |
| } |
| |
| void LiftoffAssembler::Fill(LiftoffRegister reg, int offset, ValueType type) { |
| bailout(kUnsupportedArchitecture, "Fill"); |
| } |
| |
| void LiftoffAssembler::FillI64Half(Register, int offset, RegPairHalf) { |
| bailout(kUnsupportedArchitecture, "FillI64Half"); |
| } |
| |
| void LiftoffAssembler::FillStackSlotsWithZero(int start, int size) { |
| DCHECK_LT(0, size); |
| DCHECK_EQ(0, size % 4); |
| RecordUsedSpillOffset(start + size); |
| |
| // We need a zero reg. Always use r0 for that, and push it before to restore |
| // its value afterwards. |
| push(r0); |
| mov(r0, Operand(0)); |
| |
| if (size <= 36) { |
| // Special straight-line code for up to nine words. Generates one |
| // instruction per word. |
| for (int offset = 4; offset <= size; offset += 4) { |
| StoreP(r0, liftoff::GetHalfStackSlot(start + offset, kLowWord)); |
| } |
| } else { |
| // General case for bigger counts (9 instructions). |
| // Use r4 for start address (inclusive), r5 for end address (exclusive). |
| push(r4); |
| push(r5); |
| subi(r4, fp, Operand(start + size)); |
| subi(r5, fp, Operand(start)); |
| |
| Label loop; |
| bind(&loop); |
| StoreP(r0, MemOperand(r0)); |
| addi(r0, r0, Operand(kSystemPointerSize)); |
| cmp(r4, r5); |
| bne(&loop); |
| |
| pop(r4); |
| pop(r5); |
| } |
| |
| pop(r0); |
| } |
| |
| #define UNIMPLEMENTED_I32_BINOP(name) \ |
| void LiftoffAssembler::emit_##name(Register dst, Register lhs, \ |
| Register rhs) { \ |
| bailout(kUnsupportedArchitecture, "i32 binop:: " #name); \ |
| } |
| #define UNIMPLEMENTED_I32_BINOP_I(name) \ |
| UNIMPLEMENTED_I32_BINOP(name) \ |
| void LiftoffAssembler::emit_##name##i(Register dst, Register lhs, \ |
| int32_t imm) { \ |
| bailout(kUnsupportedArchitecture, "i32 binop_i: " #name); \ |
| } |
| #define UNIMPLEMENTED_I64_BINOP(name) \ |
| void LiftoffAssembler::emit_##name(LiftoffRegister dst, LiftoffRegister lhs, \ |
| LiftoffRegister rhs) { \ |
| bailout(kUnsupportedArchitecture, "i64 binop: " #name); \ |
| } |
| #define UNIMPLEMENTED_I64_BINOP_I(name) \ |
| UNIMPLEMENTED_I64_BINOP(name) \ |
| void LiftoffAssembler::emit_##name##i(LiftoffRegister dst, \ |
| LiftoffRegister lhs, int32_t imm) { \ |
| bailout(kUnsupportedArchitecture, "i64_i binop: " #name); \ |
| } |
| #define UNIMPLEMENTED_GP_UNOP(name) \ |
| void LiftoffAssembler::emit_##name(Register dst, Register src) { \ |
| bailout(kUnsupportedArchitecture, "gp unop: " #name); \ |
| } |
| #define UNIMPLEMENTED_FP_BINOP(name) \ |
| void LiftoffAssembler::emit_##name(DoubleRegister dst, DoubleRegister lhs, \ |
| DoubleRegister rhs) { \ |
| bailout(kUnsupportedArchitecture, "fp binop: " #name); \ |
| } |
| #define UNIMPLEMENTED_FP_UNOP(name) \ |
| void LiftoffAssembler::emit_##name(DoubleRegister dst, DoubleRegister src) { \ |
| bailout(kUnsupportedArchitecture, "fp unop: " #name); \ |
| } |
| #define UNIMPLEMENTED_FP_UNOP_RETURN_TRUE(name) \ |
| bool LiftoffAssembler::emit_##name(DoubleRegister dst, DoubleRegister src) { \ |
| bailout(kUnsupportedArchitecture, "fp unop: " #name); \ |
| return true; \ |
| } |
| #define UNIMPLEMENTED_I32_SHIFTOP(name) \ |
| void LiftoffAssembler::emit_##name(Register dst, Register src, \ |
| Register amount) { \ |
| bailout(kUnsupportedArchitecture, "i32 shiftop: " #name); \ |
| } \ |
| void LiftoffAssembler::emit_##name##i(Register dst, Register src, \ |
| int32_t amount) { \ |
| bailout(kUnsupportedArchitecture, "i32 shiftop: " #name); \ |
| } |
| #define UNIMPLEMENTED_I64_SHIFTOP(name) \ |
| void LiftoffAssembler::emit_##name(LiftoffRegister dst, LiftoffRegister src, \ |
| Register amount) { \ |
| bailout(kUnsupportedArchitecture, "i64 shiftop: " #name); \ |
| } \ |
| void LiftoffAssembler::emit_##name##i(LiftoffRegister dst, \ |
| LiftoffRegister src, int32_t amount) { \ |
| bailout(kUnsupportedArchitecture, "i64 shiftop: " #name); \ |
| } |
| |
| UNIMPLEMENTED_I32_BINOP_I(i32_add) |
| UNIMPLEMENTED_I32_BINOP(i32_sub) |
| UNIMPLEMENTED_I32_BINOP(i32_mul) |
| UNIMPLEMENTED_I32_BINOP_I(i32_and) |
| UNIMPLEMENTED_I32_BINOP_I(i32_or) |
| UNIMPLEMENTED_I32_BINOP_I(i32_xor) |
| UNIMPLEMENTED_I32_SHIFTOP(i32_shl) |
| UNIMPLEMENTED_I32_SHIFTOP(i32_sar) |
| UNIMPLEMENTED_I32_SHIFTOP(i32_shr) |
| UNIMPLEMENTED_I64_BINOP_I(i64_add) |
| UNIMPLEMENTED_I64_BINOP(i64_sub) |
| UNIMPLEMENTED_I64_BINOP(i64_mul) |
| #ifdef V8_TARGET_ARCH_PPC64 |
| UNIMPLEMENTED_I64_BINOP_I(i64_and) |
| UNIMPLEMENTED_I64_BINOP_I(i64_or) |
| UNIMPLEMENTED_I64_BINOP_I(i64_xor) |
| #endif |
| UNIMPLEMENTED_I64_SHIFTOP(i64_shl) |
| UNIMPLEMENTED_I64_SHIFTOP(i64_sar) |
| UNIMPLEMENTED_I64_SHIFTOP(i64_shr) |
| UNIMPLEMENTED_GP_UNOP(i32_clz) |
| UNIMPLEMENTED_GP_UNOP(i32_ctz) |
| UNIMPLEMENTED_FP_BINOP(f32_add) |
| UNIMPLEMENTED_FP_BINOP(f32_sub) |
| UNIMPLEMENTED_FP_BINOP(f32_mul) |
| UNIMPLEMENTED_FP_BINOP(f32_div) |
| UNIMPLEMENTED_FP_BINOP(f32_min) |
| UNIMPLEMENTED_FP_BINOP(f32_max) |
| UNIMPLEMENTED_FP_BINOP(f32_copysign) |
| UNIMPLEMENTED_FP_UNOP(f32_abs) |
| UNIMPLEMENTED_FP_UNOP(f32_neg) |
| UNIMPLEMENTED_FP_UNOP_RETURN_TRUE(f32_ceil) |
| UNIMPLEMENTED_FP_UNOP_RETURN_TRUE(f32_floor) |
| UNIMPLEMENTED_FP_UNOP_RETURN_TRUE(f32_trunc) |
| UNIMPLEMENTED_FP_UNOP_RETURN_TRUE(f32_nearest_int) |
| UNIMPLEMENTED_FP_UNOP(f32_sqrt) |
| UNIMPLEMENTED_FP_BINOP(f64_add) |
| UNIMPLEMENTED_FP_BINOP(f64_sub) |
| UNIMPLEMENTED_FP_BINOP(f64_mul) |
| UNIMPLEMENTED_FP_BINOP(f64_div) |
| UNIMPLEMENTED_FP_BINOP(f64_min) |
| UNIMPLEMENTED_FP_BINOP(f64_max) |
| UNIMPLEMENTED_FP_BINOP(f64_copysign) |
| UNIMPLEMENTED_FP_UNOP(f64_abs) |
| UNIMPLEMENTED_FP_UNOP(f64_neg) |
| UNIMPLEMENTED_FP_UNOP_RETURN_TRUE(f64_ceil) |
| UNIMPLEMENTED_FP_UNOP_RETURN_TRUE(f64_floor) |
| UNIMPLEMENTED_FP_UNOP_RETURN_TRUE(f64_trunc) |
| UNIMPLEMENTED_FP_UNOP_RETURN_TRUE(f64_nearest_int) |
| UNIMPLEMENTED_FP_UNOP(f64_sqrt) |
| |
| #undef UNIMPLEMENTED_I32_BINOP |
| #undef UNIMPLEMENTED_I32_BINOP_I |
| #undef UNIMPLEMENTED_I64_BINOP |
| #undef UNIMPLEMENTED_I64_BINOP_I |
| #undef UNIMPLEMENTED_GP_UNOP |
| #undef UNIMPLEMENTED_FP_BINOP |
| #undef UNIMPLEMENTED_FP_UNOP |
| #undef UNIMPLEMENTED_FP_UNOP_RETURN_TRUE |
| #undef UNIMPLEMENTED_I32_SHIFTOP |
| #undef UNIMPLEMENTED_I64_SHIFTOP |
| |
| bool LiftoffAssembler::emit_i32_popcnt(Register dst, Register src) { |
| bailout(kUnsupportedArchitecture, "i32_popcnt"); |
| return true; |
| } |
| |
| bool LiftoffAssembler::emit_i64_popcnt(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kUnsupportedArchitecture, "i64_popcnt"); |
| return true; |
| } |
| |
| void LiftoffAssembler::emit_i32_divs(Register dst, Register lhs, Register rhs, |
| Label* trap_div_by_zero, |
| Label* trap_div_unrepresentable) { |
| bailout(kUnsupportedArchitecture, "i32_divs"); |
| } |
| |
| void LiftoffAssembler::emit_i32_divu(Register dst, Register lhs, Register rhs, |
| Label* trap_div_by_zero) { |
| bailout(kUnsupportedArchitecture, "i32_divu"); |
| } |
| |
| void LiftoffAssembler::emit_i32_rems(Register dst, Register lhs, Register rhs, |
| Label* trap_div_by_zero) { |
| bailout(kUnsupportedArchitecture, "i32_rems"); |
| } |
| |
| void LiftoffAssembler::emit_i32_remu(Register dst, Register lhs, Register rhs, |
| Label* trap_div_by_zero) { |
| bailout(kUnsupportedArchitecture, "i32_remu"); |
| } |
| |
| bool LiftoffAssembler::emit_i64_divs(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs, |
| Label* trap_div_by_zero, |
| Label* trap_div_unrepresentable) { |
| bailout(kUnsupportedArchitecture, "i64_divs"); |
| return true; |
| } |
| |
| bool LiftoffAssembler::emit_i64_divu(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs, |
| Label* trap_div_by_zero) { |
| bailout(kUnsupportedArchitecture, "i64_divu"); |
| return true; |
| } |
| |
| bool LiftoffAssembler::emit_i64_rems(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs, |
| Label* trap_div_by_zero) { |
| bailout(kUnsupportedArchitecture, "i64_rems"); |
| return true; |
| } |
| |
| bool LiftoffAssembler::emit_i64_remu(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs, |
| Label* trap_div_by_zero) { |
| bailout(kUnsupportedArchitecture, "i64_remu"); |
| return true; |
| } |
| |
| void LiftoffAssembler::emit_i64_clz(LiftoffRegister dst, LiftoffRegister src) { |
| bailout(kUnsupportedArchitecture, "i64_clz"); |
| } |
| |
| void LiftoffAssembler::emit_i64_ctz(LiftoffRegister dst, LiftoffRegister src) { |
| bailout(kUnsupportedArchitecture, "i64_ctz"); |
| } |
| |
| void LiftoffAssembler::emit_u32_to_intptr(Register dst, Register src) { |
| #ifdef V8_TARGET_ARCH_PPC64 |
| bailout(kUnsupportedArchitecture, "emit_u32_to_intptr"); |
| #else |
| // This is a nop on ppc32. |
| #endif |
| } |
| |
| bool LiftoffAssembler::emit_type_conversion(WasmOpcode opcode, |
| LiftoffRegister dst, |
| LiftoffRegister src, Label* trap) { |
| bailout(kUnsupportedArchitecture, "emit_type_conversion"); |
| return true; |
| } |
| |
| void LiftoffAssembler::emit_i32_signextend_i8(Register dst, Register src) { |
| bailout(kUnsupportedArchitecture, "emit_i32_signextend_i8"); |
| } |
| |
| void LiftoffAssembler::emit_i32_signextend_i16(Register dst, Register src) { |
| bailout(kUnsupportedArchitecture, "emit_i32_signextend_i16"); |
| } |
| |
| void LiftoffAssembler::emit_i64_signextend_i8(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kUnsupportedArchitecture, "emit_i64_signextend_i8"); |
| } |
| |
| void LiftoffAssembler::emit_i64_signextend_i16(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kUnsupportedArchitecture, "emit_i64_signextend_i16"); |
| } |
| |
| void LiftoffAssembler::emit_i64_signextend_i32(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kUnsupportedArchitecture, "emit_i64_signextend_i32"); |
| } |
| |
| void LiftoffAssembler::emit_jump(Label* label) { |
| bailout(kUnsupportedArchitecture, "emit_jump"); |
| } |
| |
| void LiftoffAssembler::emit_jump(Register target) { |
| bailout(kUnsupportedArchitecture, "emit_jump"); |
| } |
| |
| void LiftoffAssembler::emit_cond_jump(Condition cond, Label* label, |
| ValueType type, Register lhs, |
| Register rhs) { |
| bailout(kUnsupportedArchitecture, "emit_cond_jump"); |
| } |
| |
| void LiftoffAssembler::emit_i32_eqz(Register dst, Register src) { |
| bailout(kUnsupportedArchitecture, "emit_i32_eqz"); |
| } |
| |
| void LiftoffAssembler::emit_i32_set_cond(Condition cond, Register dst, |
| Register lhs, Register rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i32_set_cond"); |
| } |
| |
| void LiftoffAssembler::emit_i64_eqz(Register dst, LiftoffRegister src) { |
| bailout(kUnsupportedArchitecture, "emit_i64_eqz"); |
| } |
| |
| void LiftoffAssembler::emit_i64_set_cond(Condition cond, Register dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i64_set_cond"); |
| } |
| |
| void LiftoffAssembler::emit_f32_set_cond(Condition cond, Register dst, |
| DoubleRegister lhs, |
| DoubleRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_f32_set_cond"); |
| } |
| |
| void LiftoffAssembler::emit_f64_set_cond(Condition cond, Register dst, |
| DoubleRegister lhs, |
| DoubleRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_f64_set_cond"); |
| } |
| |
| bool LiftoffAssembler::emit_select(LiftoffRegister dst, Register condition, |
| LiftoffRegister true_value, |
| LiftoffRegister false_value, |
| ValueType type) { |
| return false; |
| } |
| |
| void LiftoffAssembler::LoadTransform(LiftoffRegister dst, Register src_addr, |
| Register offset_reg, uint32_t offset_imm, |
| LoadType type, |
| LoadTransformationKind transform, |
| uint32_t* protected_load_pc) { |
| bailout(kSimd, "Load transform unimplemented"); |
| } |
| |
| void LiftoffAssembler::emit_i8x16_swizzle(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i8x16_swizzle"); |
| } |
| |
| void LiftoffAssembler::emit_f64x2_splat(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kUnsupportedArchitecture, "emit_f64x2splat"); |
| } |
| |
| void LiftoffAssembler::emit_f64x2_extract_lane(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| uint8_t imm_lane_idx) { |
| bailout(kUnsupportedArchitecture, "emit_f64x2extractlane"); |
| } |
| |
| void LiftoffAssembler::emit_f64x2_replace_lane(LiftoffRegister dst, |
| LiftoffRegister src1, |
| LiftoffRegister src2, |
| uint8_t imm_lane_idx) { |
| bailout(kUnsupportedArchitecture, "emit_f64x2replacelane"); |
| } |
| |
| void LiftoffAssembler::emit_f64x2_abs(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kUnsupportedArchitecture, "emit_f64x2_abs"); |
| } |
| |
| void LiftoffAssembler::emit_f64x2_neg(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kUnsupportedArchitecture, "emit_f64x2neg"); |
| } |
| |
| void LiftoffAssembler::emit_f64x2_sqrt(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kUnsupportedArchitecture, "emit_f64x2sqrt"); |
| } |
| |
| bool LiftoffAssembler::emit_f64x2_ceil(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kSimd, "f64x2.ceil"); |
| return true; |
| } |
| |
| bool LiftoffAssembler::emit_f64x2_floor(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kSimd, "f64x2.floor"); |
| return true; |
| } |
| |
| bool LiftoffAssembler::emit_f64x2_trunc(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kSimd, "f64x2.trunc"); |
| return true; |
| } |
| |
| bool LiftoffAssembler::emit_f64x2_nearest_int(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kSimd, "f64x2.nearest_int"); |
| return true; |
| } |
| |
| void LiftoffAssembler::emit_f64x2_add(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_f64x2add"); |
| } |
| |
| void LiftoffAssembler::emit_f64x2_sub(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_f64x2sub"); |
| } |
| |
| void LiftoffAssembler::emit_f64x2_mul(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_f64x2mul"); |
| } |
| |
| void LiftoffAssembler::emit_f64x2_div(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_f64x2div"); |
| } |
| |
| void LiftoffAssembler::emit_f64x2_min(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_f64x2min"); |
| } |
| |
| void LiftoffAssembler::emit_f64x2_max(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_f64x2max"); |
| } |
| |
| void LiftoffAssembler::emit_f64x2_pmin(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kSimd, "pmin unimplemented"); |
| } |
| |
| void LiftoffAssembler::emit_f64x2_pmax(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kSimd, "pmax unimplemented"); |
| } |
| |
| void LiftoffAssembler::emit_f32x4_splat(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kUnsupportedArchitecture, "emit_f32x4_splat"); |
| } |
| |
| void LiftoffAssembler::emit_f32x4_extract_lane(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| uint8_t imm_lane_idx) { |
| bailout(kUnsupportedArchitecture, "emit_f32x4extractlane"); |
| } |
| |
| void LiftoffAssembler::emit_f32x4_replace_lane(LiftoffRegister dst, |
| LiftoffRegister src1, |
| LiftoffRegister src2, |
| uint8_t imm_lane_idx) { |
| bailout(kUnsupportedArchitecture, "emit_f32x4replacelane"); |
| } |
| |
| void LiftoffAssembler::emit_f32x4_abs(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kUnsupportedArchitecture, "emit_f32x4_abs"); |
| } |
| |
| void LiftoffAssembler::emit_f32x4_neg(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kUnsupportedArchitecture, "emit_f32x4neg"); |
| } |
| |
| void LiftoffAssembler::emit_f32x4_sqrt(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kUnsupportedArchitecture, "emit_f32x4sqrt"); |
| } |
| |
| bool LiftoffAssembler::emit_f32x4_ceil(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kSimd, "f32x4.ceil"); |
| return true; |
| } |
| |
| bool LiftoffAssembler::emit_f32x4_floor(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kSimd, "f32x4.floor"); |
| return true; |
| } |
| |
| bool LiftoffAssembler::emit_f32x4_trunc(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kSimd, "f32x4.trunc"); |
| return true; |
| } |
| |
| bool LiftoffAssembler::emit_f32x4_nearest_int(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kSimd, "f32x4.nearest_int"); |
| return true; |
| } |
| |
| void LiftoffAssembler::emit_f32x4_add(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_f32x4add"); |
| } |
| |
| void LiftoffAssembler::emit_f32x4_sub(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_f32x4sub"); |
| } |
| |
| void LiftoffAssembler::emit_f32x4_mul(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_f32x4mul"); |
| } |
| |
| void LiftoffAssembler::emit_f32x4_div(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_f32x4div"); |
| } |
| |
| void LiftoffAssembler::emit_f32x4_min(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_f32x4min"); |
| } |
| |
| void LiftoffAssembler::emit_f32x4_max(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_f32x4max"); |
| } |
| |
| void LiftoffAssembler::emit_f32x4_pmin(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kSimd, "pmin unimplemented"); |
| } |
| |
| void LiftoffAssembler::emit_f32x4_pmax(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kSimd, "pmax unimplemented"); |
| } |
| |
| void LiftoffAssembler::emit_i64x2_splat(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kUnsupportedArchitecture, "emit_i64x2splat"); |
| } |
| |
| void LiftoffAssembler::emit_i64x2_extract_lane(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| uint8_t imm_lane_idx) { |
| bailout(kUnsupportedArchitecture, "emit_i64x2extractlane"); |
| } |
| |
| void LiftoffAssembler::emit_i64x2_replace_lane(LiftoffRegister dst, |
| LiftoffRegister src1, |
| LiftoffRegister src2, |
| uint8_t imm_lane_idx) { |
| bailout(kUnsupportedArchitecture, "emit_i64x2replacelane"); |
| } |
| |
| void LiftoffAssembler::emit_i64x2_neg(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kUnsupportedArchitecture, "emit_i64x2neg"); |
| } |
| |
| void LiftoffAssembler::emit_i64x2_shl(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kSimd, "i64x2_shl"); |
| } |
| |
| void LiftoffAssembler::emit_i64x2_shli(LiftoffRegister dst, LiftoffRegister lhs, |
| int32_t rhs) { |
| bailout(kSimd, "i64x2_shli"); |
| } |
| |
| void LiftoffAssembler::emit_i64x2_shr_s(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kSimd, "i64x2_shr_s"); |
| } |
| |
| void LiftoffAssembler::emit_i64x2_shri_s(LiftoffRegister dst, |
| LiftoffRegister lhs, int32_t rhs) { |
| bailout(kSimd, "i64x2_shri_s"); |
| } |
| |
| void LiftoffAssembler::emit_i64x2_shr_u(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kSimd, "i64x2_shr_u"); |
| } |
| |
| void LiftoffAssembler::emit_i64x2_shri_u(LiftoffRegister dst, |
| LiftoffRegister lhs, int32_t rhs) { |
| bailout(kSimd, "i64x2_shri_u"); |
| } |
| |
| void LiftoffAssembler::emit_i64x2_add(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i64x2add"); |
| } |
| |
| void LiftoffAssembler::emit_i64x2_sub(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i64x2sub"); |
| } |
| |
| void LiftoffAssembler::emit_i64x2_mul(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i64x2mul"); |
| } |
| |
| void LiftoffAssembler::emit_i32x4_splat(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kUnsupportedArchitecture, "emit_i32x4_splat"); |
| } |
| |
| void LiftoffAssembler::emit_i32x4_extract_lane(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| uint8_t imm_lane_idx) { |
| bailout(kUnsupportedArchitecture, "emit_i32x4extractlane"); |
| } |
| |
| void LiftoffAssembler::emit_i32x4_replace_lane(LiftoffRegister dst, |
| LiftoffRegister src1, |
| LiftoffRegister src2, |
| uint8_t imm_lane_idx) { |
| bailout(kUnsupportedArchitecture, "emit_i32x4replacelane"); |
| } |
| |
| void LiftoffAssembler::emit_i32x4_neg(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kUnsupportedArchitecture, "emit_i32x4neg"); |
| } |
| |
| void LiftoffAssembler::emit_v32x4_anytrue(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kSimd, "v32x4_anytrue"); |
| } |
| |
| void LiftoffAssembler::emit_v32x4_alltrue(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kSimd, "v32x4_alltrue"); |
| } |
| |
| void LiftoffAssembler::emit_i32x4_bitmask(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kSimd, "i32x4_bitmask"); |
| } |
| |
| void LiftoffAssembler::emit_i32x4_shl(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kSimd, "i32x4_shl"); |
| } |
| |
| void LiftoffAssembler::emit_i32x4_shli(LiftoffRegister dst, LiftoffRegister lhs, |
| int32_t rhs) { |
| bailout(kSimd, "i32x4_shli"); |
| } |
| |
| void LiftoffAssembler::emit_i32x4_shr_s(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kSimd, "i32x4_shr_s"); |
| } |
| |
| void LiftoffAssembler::emit_i32x4_shri_s(LiftoffRegister dst, |
| LiftoffRegister lhs, int32_t rhs) { |
| bailout(kSimd, "i32x4_shri_s"); |
| } |
| |
| void LiftoffAssembler::emit_i32x4_shr_u(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kSimd, "i32x4_shr_u"); |
| } |
| |
| void LiftoffAssembler::emit_i32x4_shri_u(LiftoffRegister dst, |
| LiftoffRegister lhs, int32_t rhs) { |
| bailout(kSimd, "i32x4_shri_u"); |
| } |
| |
| void LiftoffAssembler::emit_i32x4_add(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i32x4add"); |
| } |
| |
| void LiftoffAssembler::emit_i32x4_sub(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i32x4sub"); |
| } |
| |
| void LiftoffAssembler::emit_i32x4_mul(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i32x4mul"); |
| } |
| |
| void LiftoffAssembler::emit_i32x4_min_s(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i32x4_min_s"); |
| } |
| |
| void LiftoffAssembler::emit_i32x4_min_u(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i32x4_min_u"); |
| } |
| |
| void LiftoffAssembler::emit_i32x4_max_s(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i32x4_max_s"); |
| } |
| |
| void LiftoffAssembler::emit_i32x4_max_u(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i32x4_max_u"); |
| } |
| |
| void LiftoffAssembler::emit_i32x4_dot_i16x8_s(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kSimd, "i32x4_dot_i16x8_s"); |
| } |
| |
| void LiftoffAssembler::emit_i16x8_splat(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kUnsupportedArchitecture, "emit_i16x8splat"); |
| } |
| |
| void LiftoffAssembler::emit_i16x8_neg(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kUnsupportedArchitecture, "emit_i16x8neg"); |
| } |
| |
| void LiftoffAssembler::emit_v16x8_anytrue(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kSimd, "v16x8_anytrue"); |
| } |
| |
| void LiftoffAssembler::emit_v16x8_alltrue(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kSimd, "v16x8_alltrue"); |
| } |
| |
| void LiftoffAssembler::emit_i16x8_bitmask(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kSimd, "i16x8_bitmask"); |
| } |
| |
| void LiftoffAssembler::emit_i16x8_shl(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kSimd, "i16x8_shl"); |
| } |
| |
| void LiftoffAssembler::emit_i16x8_shli(LiftoffRegister dst, LiftoffRegister lhs, |
| int32_t rhs) { |
| bailout(kSimd, "i16x8_shli"); |
| } |
| |
| void LiftoffAssembler::emit_i16x8_shr_s(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kSimd, "i16x8_shr_s"); |
| } |
| |
| void LiftoffAssembler::emit_i16x8_shri_s(LiftoffRegister dst, |
| LiftoffRegister lhs, int32_t rhs) { |
| bailout(kSimd, "i16x8_shri_s"); |
| } |
| |
| void LiftoffAssembler::emit_i16x8_shr_u(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kSimd, "i16x8_shr_u"); |
| } |
| |
| void LiftoffAssembler::emit_i16x8_shri_u(LiftoffRegister dst, |
| LiftoffRegister lhs, int32_t rhs) { |
| bailout(kSimd, "i16x8_shri_u"); |
| } |
| |
| void LiftoffAssembler::emit_i16x8_add(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i16x8add"); |
| } |
| |
| void LiftoffAssembler::emit_i16x8_add_sat_s(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i16x8addsaturate_s"); |
| } |
| |
| void LiftoffAssembler::emit_i16x8_sub(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i16x8sub"); |
| } |
| |
| void LiftoffAssembler::emit_i16x8_sub_sat_s(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i16x8subsaturate_s"); |
| } |
| |
| void LiftoffAssembler::emit_i16x8_sub_sat_u(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i16x8subsaturate_u"); |
| } |
| |
| void LiftoffAssembler::emit_i16x8_mul(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i16x8mul"); |
| } |
| |
| void LiftoffAssembler::emit_i16x8_add_sat_u(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i16x8addsaturate_u"); |
| } |
| |
| void LiftoffAssembler::emit_i16x8_min_s(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i16x8_min_s"); |
| } |
| |
| void LiftoffAssembler::emit_i16x8_min_u(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i16x8_min_u"); |
| } |
| |
| void LiftoffAssembler::emit_i16x8_max_s(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i16x8_max_s"); |
| } |
| |
| void LiftoffAssembler::emit_i16x8_max_u(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i16x8_max_u"); |
| } |
| |
| void LiftoffAssembler::emit_i16x8_extract_lane_u(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| uint8_t imm_lane_idx) { |
| bailout(kUnsupportedArchitecture, "emit_i16x8extractlane_u"); |
| } |
| |
| void LiftoffAssembler::emit_i16x8_replace_lane(LiftoffRegister dst, |
| LiftoffRegister src1, |
| LiftoffRegister src2, |
| uint8_t imm_lane_idx) { |
| bailout(kUnsupportedArchitecture, "emit_i16x8replacelane"); |
| } |
| |
| void LiftoffAssembler::emit_i16x8_extract_lane_s(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| uint8_t imm_lane_idx) { |
| bailout(kUnsupportedArchitecture, "emit_i16x8extractlane_s"); |
| } |
| |
| void LiftoffAssembler::emit_i8x16_shuffle(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs, |
| const uint8_t shuffle[16], |
| bool is_swizzle) { |
| bailout(kSimd, "i8x16_shuffle"); |
| } |
| |
| void LiftoffAssembler::emit_i8x16_splat(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kUnsupportedArchitecture, "emit_i8x16splat"); |
| } |
| |
| void LiftoffAssembler::emit_i8x16_extract_lane_u(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| uint8_t imm_lane_idx) { |
| bailout(kUnsupportedArchitecture, "emit_i8x16extractlane_u"); |
| } |
| |
| void LiftoffAssembler::emit_i8x16_replace_lane(LiftoffRegister dst, |
| LiftoffRegister src1, |
| LiftoffRegister src2, |
| uint8_t imm_lane_idx) { |
| bailout(kUnsupportedArchitecture, "emit_i8x16replacelane"); |
| } |
| |
| void LiftoffAssembler::emit_i8x16_neg(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kUnsupportedArchitecture, "emit_i8x16neg"); |
| } |
| |
| void LiftoffAssembler::emit_v8x16_anytrue(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kSimd, "v8x16_anytrue"); |
| } |
| |
| void LiftoffAssembler::emit_v8x16_alltrue(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kSimd, "v8x16_alltrue"); |
| } |
| |
| void LiftoffAssembler::emit_i8x16_bitmask(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kSimd, "i8x16_bitmask"); |
| } |
| |
| void LiftoffAssembler::emit_i8x16_shl(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kSimd, "i8x16_shl"); |
| } |
| |
| void LiftoffAssembler::emit_i8x16_shli(LiftoffRegister dst, LiftoffRegister lhs, |
| int32_t rhs) { |
| bailout(kSimd, "i8x16_shli"); |
| } |
| |
| void LiftoffAssembler::emit_i8x16_shr_s(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kSimd, "i8x16_shr_s"); |
| } |
| |
| void LiftoffAssembler::emit_i8x16_shri_s(LiftoffRegister dst, |
| LiftoffRegister lhs, int32_t rhs) { |
| bailout(kSimd, "i8x16_shri_s"); |
| } |
| |
| void LiftoffAssembler::emit_i8x16_shr_u(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kSimd, "i8x16_shr_u"); |
| } |
| |
| void LiftoffAssembler::emit_i8x16_shri_u(LiftoffRegister dst, |
| LiftoffRegister lhs, int32_t rhs) { |
| bailout(kSimd, "i8x16_shri_u"); |
| } |
| |
| void LiftoffAssembler::emit_i8x16_extract_lane_s(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| uint8_t imm_lane_idx) { |
| bailout(kUnsupportedArchitecture, "emit_i8x16extractlane_s"); |
| } |
| |
| void LiftoffAssembler::emit_i8x16_add(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i8x16add"); |
| } |
| |
| void LiftoffAssembler::emit_i8x16_add_sat_s(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i8x16addsaturate_s"); |
| } |
| |
| void LiftoffAssembler::emit_i8x16_min_s(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i8x16_min_s"); |
| } |
| |
| void LiftoffAssembler::emit_i8x16_min_u(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i8x16_min_u"); |
| } |
| |
| void LiftoffAssembler::emit_i8x16_max_s(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i8x16_max_s"); |
| } |
| |
| void LiftoffAssembler::emit_i8x16_max_u(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i8x16_max_u"); |
| } |
| |
| void LiftoffAssembler::emit_i8x16_eq(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i8x16_eq"); |
| } |
| |
| void LiftoffAssembler::emit_i8x16_ne(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i8x16_ne"); |
| } |
| |
| void LiftoffAssembler::emit_i8x16_gt_s(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i8x16gt_s"); |
| } |
| |
| void LiftoffAssembler::emit_i8x16_gt_u(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i8x16gt_u"); |
| } |
| |
| void LiftoffAssembler::emit_i8x16_ge_s(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i8x16ge_s"); |
| } |
| |
| void LiftoffAssembler::emit_i8x16_ge_u(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i8x16ge_u"); |
| } |
| |
| void LiftoffAssembler::emit_i16x8_eq(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i16x8_eq"); |
| } |
| |
| void LiftoffAssembler::emit_i16x8_ne(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i16x8_ne"); |
| } |
| |
| void LiftoffAssembler::emit_i16x8_gt_s(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i16x8gt_s"); |
| } |
| |
| void LiftoffAssembler::emit_i16x8_gt_u(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i16x8gt_u"); |
| } |
| |
| void LiftoffAssembler::emit_i16x8_ge_s(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i16x8ge_s"); |
| } |
| |
| void LiftoffAssembler::emit_i16x8_ge_u(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i16x8ge_u"); |
| } |
| |
| void LiftoffAssembler::emit_i32x4_eq(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i32x4_eq"); |
| } |
| |
| void LiftoffAssembler::emit_i32x4_ne(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i32x4_ne"); |
| } |
| |
| void LiftoffAssembler::emit_i32x4_gt_s(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i32x4gt_s"); |
| } |
| |
| void LiftoffAssembler::emit_i32x4_gt_u(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_32x4gt_u"); |
| } |
| |
| void LiftoffAssembler::emit_i32x4_ge_s(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i32x4ge_s"); |
| } |
| |
| void LiftoffAssembler::emit_i32x4_ge_u(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i32x4ge_u"); |
| } |
| |
| void LiftoffAssembler::emit_f32x4_eq(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_f32x4_eq"); |
| } |
| |
| void LiftoffAssembler::emit_f32x4_ne(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_f32x4_ne"); |
| } |
| |
| void LiftoffAssembler::emit_f32x4_lt(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_f32x4_lt"); |
| } |
| |
| void LiftoffAssembler::emit_f32x4_le(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_f32x4_le"); |
| } |
| |
| void LiftoffAssembler::emit_f64x2_eq(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_f64x2_eq"); |
| } |
| |
| void LiftoffAssembler::emit_f64x2_ne(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_f64x2_ne"); |
| } |
| |
| void LiftoffAssembler::emit_f64x2_lt(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_f64x2_lt"); |
| } |
| |
| void LiftoffAssembler::emit_f64x2_le(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_f64x2_le"); |
| } |
| |
| void LiftoffAssembler::emit_s128_const(LiftoffRegister dst, |
| const uint8_t imms[16]) { |
| bailout(kUnsupportedArchitecture, "emit_s128_const"); |
| } |
| |
| void LiftoffAssembler::emit_s128_not(LiftoffRegister dst, LiftoffRegister src) { |
| bailout(kUnsupportedArchitecture, "emit_s128_not"); |
| } |
| |
| void LiftoffAssembler::emit_s128_and(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_s128_and"); |
| } |
| |
| void LiftoffAssembler::emit_s128_or(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_s128_or"); |
| } |
| |
| void LiftoffAssembler::emit_s128_xor(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_s128_xor"); |
| } |
| |
| void LiftoffAssembler::emit_s128_select(LiftoffRegister dst, |
| LiftoffRegister src1, |
| LiftoffRegister src2, |
| LiftoffRegister mask) { |
| bailout(kUnsupportedArchitecture, "emit_s128select"); |
| } |
| |
| void LiftoffAssembler::emit_i32x4_sconvert_f32x4(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kSimd, "i32x4_sconvert_f32x4"); |
| } |
| |
| void LiftoffAssembler::emit_i32x4_uconvert_f32x4(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kSimd, "i32x4_uconvert_f32x4"); |
| } |
| |
| void LiftoffAssembler::emit_f32x4_sconvert_i32x4(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kSimd, "f32x4_sconvert_i32x4"); |
| } |
| |
| void LiftoffAssembler::emit_f32x4_uconvert_i32x4(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kSimd, "f32x4_uconvert_i32x4"); |
| } |
| |
| void LiftoffAssembler::emit_i8x16_sconvert_i16x8(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i8x16_sconvert_i16x8"); |
| } |
| |
| void LiftoffAssembler::emit_i8x16_uconvert_i16x8(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i8x16_uconvert_i16x8"); |
| } |
| |
| void LiftoffAssembler::emit_i16x8_sconvert_i32x4(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i16x8_sconvert_i32x4"); |
| } |
| |
| void LiftoffAssembler::emit_i16x8_uconvert_i32x4(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i16x8_uconvert_i32x4"); |
| } |
| |
| void LiftoffAssembler::emit_i16x8_sconvert_i8x16_low(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kUnsupportedArchitecture, "emit_i16x8_sconvert_i8x16_low"); |
| } |
| |
| void LiftoffAssembler::emit_i16x8_sconvert_i8x16_high(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kUnsupportedArchitecture, "emit_i16x8_sconvert_i8x16_high"); |
| } |
| |
| void LiftoffAssembler::emit_i16x8_uconvert_i8x16_low(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kUnsupportedArchitecture, "emit_i16x8_uconvert_i8x16_low"); |
| } |
| |
| void LiftoffAssembler::emit_i16x8_uconvert_i8x16_high(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kUnsupportedArchitecture, "emit_i16x8_uconvert_i8x16_high"); |
| } |
| |
| void LiftoffAssembler::emit_i32x4_sconvert_i16x8_low(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kUnsupportedArchitecture, "emit_i32x4_sconvert_i16x8_low"); |
| } |
| |
| void LiftoffAssembler::emit_i32x4_sconvert_i16x8_high(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kUnsupportedArchitecture, "emit_i32x4_sconvert_i16x8_high"); |
| } |
| |
| void LiftoffAssembler::emit_i32x4_uconvert_i16x8_low(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kUnsupportedArchitecture, "emit_i32x4_uconvert_i16x8_low"); |
| } |
| |
| void LiftoffAssembler::emit_i32x4_uconvert_i16x8_high(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kUnsupportedArchitecture, "emit_i32x4_uconvert_i16x8_high"); |
| } |
| |
| void LiftoffAssembler::emit_s128_and_not(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_s128_and_not"); |
| } |
| |
| void LiftoffAssembler::emit_i8x16_rounding_average_u(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i8x16_rounding_average_u"); |
| } |
| |
| void LiftoffAssembler::emit_i16x8_rounding_average_u(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i16x8_rounding_average_u"); |
| } |
| |
| void LiftoffAssembler::emit_i8x16_abs(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kUnsupportedArchitecture, "emit_i8x16_abs"); |
| } |
| |
| void LiftoffAssembler::emit_i16x8_abs(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kUnsupportedArchitecture, "emit_i16x8_abs"); |
| } |
| |
| void LiftoffAssembler::emit_i32x4_abs(LiftoffRegister dst, |
| LiftoffRegister src) { |
| bailout(kUnsupportedArchitecture, "emit_i32x4_abs"); |
| } |
| |
| void LiftoffAssembler::emit_i8x16_sub(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i8x16sub"); |
| } |
| |
| void LiftoffAssembler::emit_i8x16_sub_sat_s(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i8x16subsaturate_s"); |
| } |
| |
| void LiftoffAssembler::emit_i8x16_sub_sat_u(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i8x16subsaturate_u"); |
| } |
| |
| void LiftoffAssembler::emit_i8x16_mul(LiftoffRegister dst, LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i8x16mul"); |
| } |
| |
| void LiftoffAssembler::emit_i8x16_add_sat_u(LiftoffRegister dst, |
| LiftoffRegister lhs, |
| LiftoffRegister rhs) { |
| bailout(kUnsupportedArchitecture, "emit_i8x16addsaturate_u"); |
| } |
| |
| void LiftoffAssembler::StackCheck(Label* ool_code, Register limit_address) { |
| bailout(kUnsupportedArchitecture, "StackCheck"); |
| } |
| |
| void LiftoffAssembler::CallTrapCallbackForTesting() { |
| bailout(kUnsupportedArchitecture, "CallTrapCallbackForTesting"); |
| } |
| |
| void LiftoffAssembler::AssertUnreachable(AbortReason reason) { |
| bailout(kUnsupportedArchitecture, "AssertUnreachable"); |
| } |
| |
| void LiftoffAssembler::PushRegisters(LiftoffRegList regs) { |
| bailout(kUnsupportedArchitecture, "PushRegisters"); |
| } |
| |
| void LiftoffAssembler::PopRegisters(LiftoffRegList regs) { |
| bailout(kUnsupportedArchitecture, "PopRegisters"); |
| } |
| |
| void LiftoffAssembler::DropStackSlotsAndRet(uint32_t num_stack_slots) { |
| bailout(kUnsupportedArchitecture, "DropStackSlotsAndRet"); |
| } |
| |
| void LiftoffAssembler::CallC(const wasm::FunctionSig* sig, |
| const LiftoffRegister* args, |
| const LiftoffRegister* rets, |
| ValueType out_argument_type, int stack_bytes, |
| ExternalReference ext_ref) { |
| bailout(kUnsupportedArchitecture, "CallC"); |
| } |
| |
| void LiftoffAssembler::CallNativeWasmCode(Address addr) { |
| bailout(kUnsupportedArchitecture, "CallNativeWasmCode"); |
| } |
| |
| void LiftoffAssembler::TailCallNativeWasmCode(Address addr) { |
| bailout(kUnsupportedArchitecture, "TailCallNativeWasmCode"); |
| } |
| |
| void LiftoffAssembler::CallIndirect(const wasm::FunctionSig* sig, |
| compiler::CallDescriptor* call_descriptor, |
| Register target) { |
| bailout(kUnsupportedArchitecture, "CallIndirect"); |
| } |
| |
| void LiftoffAssembler::TailCallIndirect(Register target) { |
| bailout(kUnsupportedArchitecture, "TailCallIndirect"); |
| } |
| |
| void LiftoffAssembler::CallRuntimeStub(WasmCode::RuntimeStubId sid) { |
| bailout(kUnsupportedArchitecture, "CallRuntimeStub"); |
| } |
| |
| void LiftoffAssembler::AllocateStackSlot(Register addr, uint32_t size) { |
| bailout(kUnsupportedArchitecture, "AllocateStackSlot"); |
| } |
| |
| void LiftoffAssembler::DeallocateStackSlot(uint32_t size) { |
| bailout(kUnsupportedArchitecture, "DeallocateStackSlot"); |
| } |
| |
| void LiftoffStackSlots::Construct() { |
| asm_->bailout(kUnsupportedArchitecture, "LiftoffStackSlots::Construct"); |
| } |
| |
| } // namespace wasm |
| } // namespace internal |
| } // namespace v8 |
| |
| #undef BAILOUT |
| |
| #endif // V8_WASM_BASELINE_PPC_LIFTOFF_ASSEMBLER_PPC_H_ |
