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ac9ac065c5083565917b15e7a672a79599f2f00b
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src
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third_party
/
llvm-project
/
llvm
/
test
/
CodeGen
/
Hexagon
/
vect
/
vect-vsubh.ll
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; RUN: llc -march=hexagon < %s | FileCheck %s
; CHECK: vsubh
define
<
2
x
i16
>
@t_i2x16
(<
2
x
i16
>
%a
,
<
2
x
i16
>
%b
)
nounwind
{
entry
:
%0
=
sub
<
2
x
i16
>
%a
,
%b
ret
<
2
x
i16
>
%0
}