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llvm
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test
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CodeGen
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X86
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vshift_split.ll
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; RUN: llc < %s -mtriple=i686-- -mattr=+sse2
; Example that requires splitting and expanding a vector shift.
define
<
2
x
i64
>
@update
(<
2
x
i64
>
%val
)
nounwind
readnone
{
entry
:
%shr
=
lshr
<
2
x
i64
>
%val
,
<
i64
2
,
i64
3
>
ret
<
2
x
i64
>
%shr
}