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llvm-project
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llvm
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test
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CodeGen
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Hexagon
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vect
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vect-mul-v4i16.ll
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; RUN: llc -march=hexagon < %s | FileCheck %s
; CHECK: vmpyh
; CHECK: vmpyh
; CHECK: vtrunewh
define
<
4
x
i16
>
@t_i4x16
(<
4
x
i16
>
%a
,
<
4
x
i16
>
%b
)
nounwind
{
entry
:
%0
=
mul
<
4
x
i16
>
%a
,
%b
ret
<
4
x
i16
>
%0
}